ROM storage cell and method of fabrication
AssigneeInternational Business Machines Corporation
InventorsGordon M. Babson, Allen W. Brouillette, Richard J. Evans, Robert J. Finch, Philip H. Noel, Richard J. Ross
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Abstract
A process and structure are disclosed for a programmable array for use in a read-only memory comprising diode elements and shorted diode elements. The elements are connected across bit and wordlines. The invention utilizes lateral polysilicon diodes and metal silicide layer bridging the junction of pre-selected diodes to short pre-selected diode elements. Programming is accomplished by either forming the silicide layer across the junctions of pre-selected diodes or removing the silicide layer from the junctions of pre-selected diodes.
Claims10
A method comprising the steps of:
- forming a first insulating layer on a substrate;
- forming a polysilicon layer on said first insulating layer;
- patterning and etching said polysilicon layer into a plurality of polysilicon blocks;
- doping a first region of each said polysilicon blocks with a first dopant type and doping a second abutting region of each said polysilicon blocks with a second dopant type whereby a junction region is formed;
- depositing a layer of silicide forming metal;
- removing said silicide forming metal from a predetermined area over preselected junction regions;
- sintering to form a metallic silicide including removing unreacted portions of the silicide forming metal;
- and
- forming a first conductive line connecting selected first regions of said polysilicon blocks and a second conductive line connecting selected second regions of said polysilicon blocks.
A method comprising the steps of:
- forming a first insulating layer on a substrate;
- forming a polysilicon layer on said first insulating layer;
- patterning and etching said polysilicon layer into a plurality of polysilicon blocks;
- doping a first region of each said polysilicon blocks with a first dopant type and doping a second abutting region of each said polysilicon blocks with a second dopant type whereby a junction region is formed;
- depositing a layer of silicide forming metal;
- sintering to form a metallic silicide including removing unreacted portions of the silicide forming metal;
- and
- forming a first conductive line connecting selected first regions of said polysilicon blocks and a second conductive line connecting selected second regions of said polysilicon blocks.
Dependencies are inferred from the claim text.