Method of reducing dielectric damage from plasma etch charging
AssigneeLucent Technologies Inc.
InventorsRichard William Gregor, Chung Wai Leung
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AssigneeLucent Technologies Inc.
InventorsRichard William Gregor, Chung Wai Leung
Estimating the term…
A method of suppressing damage to gate dielectrics by reducing the electrical field across the gate dielectric during plasma etching, photoresist stripping, or plasma assisted deposition of the overlying conductor to be etched. Openings in the gate oxide in the vicinity of the gates to be formed place the two conductive layers in contact with each other before the gates are formed and allows for the underlying conductive layer (usually the substrate) to be exposed to the plasma as the overlying unmasked conductive layer (usually polysilicon) is etched away. Preferably, the layer to be etched is deposited to be in contact with the underlying layer at the openings. This technique is applicable to integrated capacitor structures and other susceptible structures with a dielectric layer between two conductors.
A method of making an integrated circuit, comprising the steps of:
Dependencies are inferred from the claim text.