Method of forming BiCMOS circuitry

A method of forming BiCMOS circuitry comprising the following steps:

• providing a first area on a first conductivity type semiconductor substrate for formation of a first conductivity type FET, providing a second area on the semiconductor substrate for formation of a second conductivity type FET, and providing a third area on the semiconductor substrate for formation of a bipolar transistor, the bipolar transistor comprising opposing second conductivity type collector and emitter regions and an intervening first conductivity type base region, the FETs comprising respective channel and opposing source/drain regions;
• conducting a first common second conductivity type implant into, a) the first substrate area to comprise a second conductivity type well for the first area first conductivity type FET, and b) the third substrate area to comprise one of the bipolar transistor second conductivity type collector or emitter regions;
• providing field oxide regions and active area regions within the first, second and third areas of the substrate;
• conducting a first common first conductivity type implant into, a) the second substrate area to comprise a first conductivity type channel stop region beneath field oxide in the second area, and b) the third substrate area to comprise the bipolar transistor base;
• and
• conducting a second common second conductivity type implant into, a) at least one of the first or the second substrate areas to comprise at least one of a source/drain implant or a graded junction implant for at least one of the first or second conductivity type FETs, and b) the third substrate area to comprise the other of the second conductivity type collector or emitter regions.