Semiconductor integrated circuit

A semiconductor integrated circuit having a current mirror circuit, the current mirror circuit comprising first and second bipolar transistors having a base region of a first conductivity type, an emitter region of a second conductivity type formed in a surface region of the base region, and first and second collector regions of the second conductivity type formed in the base region separately from the emitter regions, one of the emitter region and the collector region of each of the first and second transistors constituting an input terminal, and the other one of the emitter region and collector region constituting an output terminal, means connecting the output terminal of the first transistor to the base region of the first transistor, first and second control electrodes each formed via an insulating film on the surface region of the base region between the emitter region and the collector region of each of the first and second transistors, bias means connected between the output terminal of said first transistor and the first and second control electrodes for providing a bias voltage to said first and second control electrodes corresponding to an output current flowing through said output terminal of said first transistor, so that voltages on said first and second control electrodes change in accordance with the output current flowing through said output terminal of said first transistor, whereby current amplification factors of said first and second transistors are increased, means for providing an output current of the first transistor as a reference current, and means for providing an output current of the second transistor as a current source.

A semiconductor integrated circuit having a current mirror circuit, comprising:

• a first region of a first conductivity type formed in a semiconductor substrate of a second conductivity type;
• a second region of the second conductivity type formed in a surface region of the first region;
• a third region of the second conductivity type formed in the surface region of the first region
• a fourth region of the second conductivity type formed in the surface region of the first region between the second and third regions and separately from the second and third regions;
• a first control electrode formed with a first insulating film between the second and fourth regions and on the surface of the semiconductor substrate;
• a second control electrode formed with a second insulating film between the third and fourth regions and on the surface of the semiconductor substrate;
• a bias element;
• a load element;
• first wiring connecting the second region to the first region;
• second wiring connecting the first wiring to an input terminal of the bias element;
• third wiring connecting an output terminal of the bias element to an input terminal of the load element;
• fourth wiring connecting an output terminal of the load element to an output voltage;
• fifth wiring connecting the output terminal of the bias element to the first control electrode;
• sixth wiring connecting the output terminal of the load element to the first control electrode;
• seventh wiring connecting the fourth region to an input voltage;
• and
• eighth wiring connected to the third region,
• wherein said bias element is connected between the second region and the first and second control electrodes, for providing a bias voltage to said first and second control electrodes corresponding to an output current flowing through said second region so that voltages on said first and second control electrodes change in accordance with the output current flowing through said second region.