Method of manufacturing a BIMIS

A method of manufacturing a semiconductor integrated circuit device which comprises a bipolar transistor and an MIS transistor both formed on a semiconductor substrate, said bipolar transistor comprising a base region of a first conduction type formed on a main surface of said semiconductor substrate, a base electr electrically connected to the base region and made of a second conduction type opposite to the first conduction type which is formed on a surface of the base region, and an emitter electrode electrically connected to the emitter region and made of phosphorus- doped polysilicon, the method comprising the steps of :

• (a) forming an insulating film on a surface of said base region and forming a connection opening in the insulating film to expose and emitter-forming region;
• (b) forming a phosphorus-containing amorphous silicon film on said semiconductor substrate at said emitter-forming region;
• (c) subjecting said semiconductor substrate to a low temperture thermal treatment in a range of temperture where said amorphous silicon film is converted into a polysilicon film and the phosphorus present in said amorphous silicon film is diffuded into the base region of said semiconductor substrate to form an emitter region on the surface of said base region;
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• (d) subjecting said semiconductor substrate to a high temperature/short time thermal treatment whereby a resistance of said base electrode is reduced.

A method of manufacturing a semiconductoar intergrated circuit device which comprises a bipolar transistor and an MIS transistor both formed on a semiconductor substrate, said bipolar transistor comprising an emitter region formed on a main surface of said semiconductor substrate, and an emitter electrode electrically connected to the emitter region and made of phosphorus-doped polysilicon, the method comprising the steps of:

• (a) forming a phosphorus-containing amorphous silicon film on said semiconductor substrate;
• (b) subjecting said semiconductor substrate to a low temperature thermal treatment in a range of temperature where said amorphous silicon film is converted into a polysilicon film and the phosphorus present in said amorphous silicon film is diffused into the main surface of said semiconductor substrate to form an emitter region;
• and
• (c) subjecting said semiconductor substrate to a high temperature/short time thermal treatment so that the diffused phosphorus is actuated.

A method of manufacturing a semiconductor integrated circuit device which comprises a bipolar transistor including a base region of a first conduction type formed on a main surface of said semiconductor substrate, a base electrode electrically connected to an outer periphery of said base region and made of polysilicon of the first conduction type, an emitter region formed on the surface of said base region, and an emitter electrode having a periphery defined with a side wall insulating film formed on a side wall of said base electrode and which is made of polysilicon and electrically connected to said emitter region, the method comprising the steps of:

• (a) forming an insulating film on said semiconductor substrate including said base region and said base electrode and etching said insulating film back to form said side wall insulating film whereby said base region defined with said side wall insulating film at a periphery thereof is exposed at the surface thereof;
• (b) forming a phosphorus-containing amorphous silicon film on said semiconductor substrate including the exposed surface of said base region;
• (c) subjecting said semiconductor substrate to a low temperature thermal treatment in a range of temperature where said amorphous silicon film is converted into a polysilicon film and the phosphorus present in said amorphous silicon film is diffused into the base region of said semiconductor substrate to form an emitter region on the surface of said base region;
• and
• (d) subjecting said semiconductor substrate to a high temperature/short time thermal treatment said base level is within a range whereby a resistance of said base electrode is reduced.