Ramp voltage generator for differential switching amplifiers

An externally synchronizable ramp voltage generator for use in a low power differential switching amplifier, comprising:

• a plurality of ramp voltage generating circuits, each of said ramp voltage generating circuits operable to generate a periodic ramp voltage waveform including a constant-slope segment slewing from a first predetermined voltage potential for a time duration determined by a control signal;
• a comparator circuit operable to generate a switching signal when an input exceeds a second predetermined voltage potential;
• a switching circuit selectively operable to connect said input of said comparator circuit to an output of at least one of said ramp voltage generating circuits;
• and
• a sequencing circuit operable to control said switching circuit to select each of said constant-slope segments in periodic succession, such that the output ramp voltage waveform of at least one of said ramp voltage generating circuits is reset to said first predetermined voltage potential while an output of a second of said ramp voltage generating circuits is coupled to said input of said comparator circuit, said second of said ramp voltage generating circuits thereby generating an idealized sawtooth ramp voltage waveform, said sequencing circuit responsive to an external periodic signal.

An interlaced ramp generator circuit, comprising:

• a plurality of ramp voltage generating circuits, each of said ramp voltage generating circuits operable to generate a periodic ramp voltage waveform including a constant-slope segment slewing from a first predetermined voltage potential for a time duration determined by a control signal;
• a plurality of comparator circuits, each operable to generate a switching signal when a respective input exceeds a second predetermined voltage potential;
• a plurality of switching circuits, each operable to connect one of said respective inputs of said comparator circuits to a respective output of one of said ramp voltage generating circuits;
• and
• a sequencing circuit operable to control each of said switching circuits to select each of said constant-slope segments in periodic succession, such that the output ramp voltage waveform of each of said ramp voltage generating circuits is reset to said first predetermined voltage potential during a time interval when said respective output of said one of said ramp voltage generating circuits is not connected to a comparator circuit, said sequencing circuit responsive to each of said switching signals such that each of said ramp voltage generating circuits thereby generates an idealized sawtooth ramp voltage waveform, said idealized waveforms having a predetermined phase relationship with each other.

An interlaced ramp differential switching amplifier, comprising:

• a plurality of ramp voltage generating circuits, each of said ramp voltage generating circuits operable to generate a periodic ramp voltage waveform including a constant-slope segment slewing from a first predetermined voltage potential for a time duration determined by a control signal;
• a plurality of comparator circuits, each operable to generate a switching signal when a respective input exceeds a second predetermined voltage potential;
• a plurality of switching circuits, each operable to connect one of said respective inputs of said comparator circuits to a respective output of one of said ramp voltage generating circuits;
• and
• a sequencing circuit operable to control each of said switching circuits to select each of said constant-slope segments in periodic succession, such that the output ramp voltage waveform of each of said ramp voltage generating circuits is reset to said first predetermined voltage potential during a time interval when said respective output of said one of said ramp voltage generating circuits is not connected to a comparator circuit, said sequencing circuit responsive to each of said switching signals such that each of said ramp voltage generating circuits thereby generates an idealized sawtooth ramp voltage waveform, said idealized waveforms having a predetermined phase relationship with each other, an arithmetic difference between output voltage levels of two of said comparator circuits defining a differential output, a first of said two of said comparator circuits operable to output a first fixed output voltage when its said respective input exceeds said second predetermined voltage potential and otherwise output a second fixed output voltage, a second of said two of said comparator circuits operable to output said second fixed output voltage when its said respective input exceeds said second predetermined voltage potential and otherwise output said first fixed output voltage, said periodic ramp voltage waveforms controlling a level of said second predetermined voltage potential.