Memory system and data communications system

A data communications system comprising:

• a processor unit for transmitting and receiving data messages;
• a communication module for transmitting and receiving data messages;
• and
• a memory system for storing data messages received from the communication module for subsequent transmission to the processor unit and for storing data messages received from the processor unit for subsequent transmission to the communication module, each data message comprising at least one data word, the memory system comprising:
• a memory array having a plurality of memory buffers, each buffer for storing a data message;
• logic circuitry coupled to the memory array for setting one bit of a data message stored in one of the memory buffers to a first logic state during a processor unit read access when the processor unit reads the data message from the one of the memory buffers, and for negating the one bit to a second logic state during a communication module write access when the communication module writes a new data message into the one of the memory buffers, wherein when the communication module is to write a new data message to one of the memory buffers, the state of the one bit of the current data message stored in the one memory buffer provides an indication as to whether the new data message will overwrite the current data message, which current data message has not been read by the processor unit or whether the new data message will overwrite the current data message, which current data message has been read by the processor unit.