Instruction dependency chain indentifier
AssigneeIntel Corporation
InventorsGad S. Sheaffer, Robert Valentine
Life of this patent
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AssigneeIntel Corporation
InventorsGad S. Sheaffer, Robert Valentine
Estimating the term…
A method and apparatus for identifying a sequence of instructions that generate data used by an instruction in a programmed flow of instructions includes a bit array of i lines, where i is an integer, each line representing an instruction in an ordered sequence of instructions. A line in the bit array is made up of a string of bits in which a bit position is set corresponding to a preceding instruction that the instruction is dependent upon. Logic coupled to the bit array generates the string of bits for the next instruction by setting bit positions which correspond to directly dependent instructions and additional bit positions corresponding to the predecessor instructions.
Apparatus for identifying instruction dependencies comprising:
In an out-of-order computing system, a method of operation comprising the steps of:
A method of identifying instruction dependencies for an ordered set of instructions comprising the steps of:
Dependencies are inferred from the claim text.