Delta connected resonant snubber circuit

A resonant snubber-based, soft switching, multi-phase, inverter circuit for achieving lossless switching of circuit components, comprising:

• a main inverter circuit having a plurality of main switches and sources of capacitance in parallel with said main switches, said main circuit producing a plurality of current phases;
• an auxiliary resonant snubber circuit connected to said inverter circuit in a delta configuration and having a plurality of resonant snubber branches for repetitively producing zero voltage across each of said main switches and sources of capacitance, each of said snubber branches comprising an inductor and an auxiliary switch connected in series with said inductor;
• and
• a controller for controlling said main and auxiliary switches to achieve lossless switching by switching said auxiliary switches to produce zero voltage conditions across said main switches and by switching said main switches during said zero voltage conditions.

A resonant snubber-based, soft switching, single-phase, inverter circuit for achieving lossless switching of circuit components, comprising:

• a main inverter circuit having a plurality of main switches and sources of capacitance connected to said main switches, said main circuit producing a single phase output current;
• an auxiliary resonant snubber circuit connected to said inverter circuit in a delta configuration and having one resonant snubber branch for repetitively producing zero voltage across each of said main switches and sources of capacitance, said snubber branch comprising an inductor and one bi-directional, auxiliary switch connected in series with said inductor;
• and
• a controller for controlling said main and auxiliary switches to achieve lossless switching by switching said auxiliary switch to produce zero voltage conditions across said main switches and by switching said main switches during said zero voltage conditions.

A resonant snubber-based, soft switching, single-phase, inverter circuit for achieving lossless switching of circuit components, comprising:

• a main inverter circuit having a plurality of main switches and sources of capacitance connected to said main switches, said main circuit producing a single phase output current;
• an auxiliary resonant snubber circuit connected to said inverter circuit in a delta configuration and having two resonant snubber branches for repetitively producing zero voltage across each of said main switches and sources of capacitance, each of said snubber branches comprising an inductor and one auxiliary switch connected in series with said inductor;
• and
• a controller for controlling said main and auxiliary switches to achieve lossless switching by switching said auxiliary switches to produce zero voltage conditions across said main switches and by switching said main switches during said zero voltage conditions.

A method for achieving lossless resonant snubbing during switching of an inverter circuit having a first upper main switch and a first lower main switch connected in series, and a second upper main switch and a second lower main switch connected in series, each of the main switches having a parallel capacitance associated with the switch, the method comprising the steps of:

• turning on the first lower main switch and second upper main switch so that the first lower and second upper main switches conduct current;
• providing one or more resonant snubber branches, each of said snubber branches being connected in a delta configuration at junctions between said upper and lower main switches;
• turning on a predetermined auxiliary switch located within a resonant snubber branch to produce increasing current flows in said resonant snubber branch and decreasing voltage across said first lower and second upper main switches;
• turning off said first lower and second upper main switches when the voltage across said first lower and second upper switches is zero, thereby initiating resonant discharge of the capacitances located in parallel with the first upper main switch and the second lower main switch to produce a zero voltage condition across said first upper and second lower main switches;
• and
• turning on said first upper and second lower main switches at said zero voltage condition.

A method for achieving lossless resonant snubbing during transition cycle switching of an inverter circuit having a first upper main switch and a first lower main switch connected in series, a second upper main switch and a second lower main switch connected in series, and a load that is drawing a load current, said first upper and second lower switches in an initially off state with substantially zero current flow, said second upper and first lower switches in an initially on state with positive current flow, each of the main switches having a parallel capacitance associated with the switch, for one transition switching cycle the method comprising the steps of:

• providing a first resonant snubber branch comprising:
• a first inductor;
• a first diode in series connection with said first inductor;
• and
• a first auxiliary semiconductor switch in series connection with said first inductor and said first diode;
• providing a second resonant snubber branch comprising:
• a second inductor;
• a second diode in series connection with said second inductor;
• and
• a second auxiliary semiconductor switch in series connection with said second inductor and said second diode;
• turning on the second auxiliary semiconductor switch to substantially linearly increase current flow through the second inductor and reduce the current flow through the second upper and first lower main switches to zero when the second inductor current equals the load current;
• turning off the second upper and first lower main switches when the second inductor current is sufficient to charge and discharge said sources of capacitance, thereby charging the parallel capacitances associated with the second upper and first lower main switches until the second upper and first lower capacitances conduct current and discharging to zero voltage the parallel capacitances associated with the first upper and second lower main switches, producing zero voltage across said first upper and second lower main switches;
• turning on the first upper and second lower main switches at zero voltage;
• diverting the load current to antiparalleled diodes associated with the first upper and second lower main switches as the second inductor current decreases linearly;
• diverting current from the antiparalleled diodes associated with the first upper and second lower main switches to the first upper and second lower main switches when the second inductor current equals the load current, producing linearly increasing current flow through the first upper and second lower main switches;
• and
• turning off the second auxiliary semiconductor switch when the second inductor current equals zero.