Phase-locked loop for signals having rectangular waveforms

Phase-locked loop, comprising, in series, a phase detector, a control signal generator circuit having a loop filter, and a controlled oscillator which delivers an oscillator output signal having oscillator frequency (f.sub.a) between two extreme oscillator frequencies (f.sub.min, f.sub.max), a first input of the detector receiving from outside the loop a reference signal having a rectangular waveform with a reference frequency (f.sub.r) and with a duty cycle between the values zero and one, a second input of the detector receiving a first comparison signal derived from the oscillator output signal and having the same form as the reference signal, the detector operating at coincidence or noncoincidence of input signals it receives, the detector deriving a first combination signal by performing a logic combination function for the reference signal and the first comparison signal, the detector delivering an output signal, dependent on the first combination signal of the detector and the detector and the control signal generator circuit being designed so that, with no frequency difference and with a phase difference between the reference signal and another input signal of the phase detector with the loop operating in a state with an immediate capture range of the loop, the control signal generator circuit delivering a control signal to the oscillator which is suitable for setting the phase difference to a predetermined valve operating in a locked state having a predetermined quiescent value of the oscillator control signal after reaching the predetermined phase difference, characterized in that an auxiliary circuit is provided between the oscillator and the detector to receive the output signal of the oscillator and to deliver to the detector the first comparison signal and a third input signal the third input signal is such that if it were to be combined by means of an exclusive OR function with the first comparison signal a waveform results which has twice the frequency of the first comparison signal and a specific duty cycle (N.sub.d) which differs from the duty cycle of the waveform of the reference signal the detector has a third input for receiving the third input signal the detector derives from input signals received from the auxiliary circuit a second combination signal having the waveform with the specific duty cycle (N.sub.d), the detector has a subtracter circuit which subtracts the first combination signal in an analog manner from the second combination signal the output signal of the detector is determined by the difference determined by the subtracter the control signal generator circuit generates at a frequency difference between the reference signal and another input signal of the phase detector an averaged value of the output signal the detector as seen over a number of cycles of the reference signal which is not equal to a value associated with the quiescent value of the oscillator control signal and at the same time alters the oscillator control signal to arrange for the oscillator frequency (f.sub.a) to be altered by the oscillator and the control signal generator circuit adjusts the loop on reaching one extreme oscillator frequency and, in doing so, alters the oscillator control signal so that the oscillator frequency (f.sub.a) is driven in an opposite direction to the other extreme oscillator frequency.