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AssigneeSpectrian Corporation
InventorsWilliam H. McCalpin, Donald K. Belcher, David S. Piazza, Pierre R. Irissou
Estimating the term…
A circuit arrangement automatically sets quiescent collector current conditions for a class A/B RF power transistor, which is configured of a plurality of parallel-connected transistors formed in a common semiconductor die. The biasing circuit arrangement includes a temperature-sensing transistor having its collector-emitter current flow path coupled with a programmable constant current source. A differential amplifier circuit is coupled to the base and emitter electrodes of the temperature sensing transistor, and generates a bias voltage for biasing each of the transistors of the RF power device. This bias voltage is combined with a programmable D.C. offset voltage. The values of the constant current and D.C. offset voltage are programmed such that the average of the quiescent collector currents of the parallel-connected transistors of the RF power transistor corresponds to the quiescent collector current through the temperature-sensing transistor. An optional external control voltage may be used to further adjust the bias voltage for the RF power transistor.
A circuit arrangement for setting collector current bias for an RF power transistor comprising a bias control circuit that is coupled with a collector-emitter current flow path of a temperature-sensing transistor resident in a common support structure for said RF power transistor, said bias control circuit being operative to establish a prescribed quiescent collector current through said temperature-sensing transistor, and wherein a base bias for said RF power transistor is derived in accordance with a differential voltage across the base and the emitter electrodes of said temperature-sensing transistor, thereby providing a collector current through said RF power transistor in accordance with operation of said temperature-sensing transistor.
A method of setting base and emitter bias conditions for an RF power transistor, so as to establish a quiescent bias collector current therefor, said RF power transistor being configured of a plurality of parallel-connected transistors in a semiconductor die, said method comprising the steps of:
A circuit arrangement for setting quiescent bias conditions for an RF power transistor comprising a temperature-sensing transistor resident in a common support structure for said RF power transistor, and a bias control circuit that is coupled to supply a constant current through the emitter-collector flow path of said temperature-sensing transistor and to bias said RF power transistor in accordance with the differential voltage developed across the base and emitter of said temperature-sensing transistor as a result of the flow of said constant current through said emitter-collector flow path of said temperature-sensing transistor.
Dependencies are inferred from the claim text.