High speed microprocessor for processing and transferring N-bits of M-bit data

A microprocessor for transferring N bits of a M-bit data stored in a first register of a microprocessor to an arbitrary M-bit data area of an external memory, where N and M are positive integers and N<M, comprising:

• a control circuit for generating control signals to control an operation of the microprocessor;
• a second register;
• a first operand bus and a second operand bus coupled to said first register and said second register;
• a mask ROM connected to the first and second operand buses and generating a predetermined mask data for masking M-N or N bits of data;
• an ALU connected to the first and second operand buses and carrying out a first operation on the M-bit data inputted from first register and the predetermined mask data and outputting a first operation result, the first operation result being temporarily stored in the second register;
• and
• a memory data register connected to the first and second operand buses and the destination bus, and receiving M-bit data from the external memory and outputting the M-bit data to said ALU via the first or second operand bus, said ALU carrying out a second operation between the M-bit data and the predetermined mask data, and outputting a second operation result to the destination bus.

A method of transferring N bits of a M-bit data stored in a first register of a microprocessor to an arbitrary M-bit data area of an external memory, where N and M are positive integers and N<M, comprising the steps of:

• retrieving and decoding an instruction from the external memory;
• performing a first logical operation on the M-bit data inputted from first register into an arithmetic logic unit (ALU) to generate a first operation result;
• outputting the first operation result via a destination bus and temporarily storing the first operation unit result in a second register, a first operand bus and a second operand bus each being coupled to said first and second registers and the ALU;
• generating a predetermined mask data stored in a mask ROM and outputting the predetermined mask data from the mask ROM to the ALU, the mask ROM being connected to the first and second operand bus and transferring the mask data from the mask ROM to the ALU via the first or second operand bus;
• performing a second logical operation between the first operation result stored in the second register and the predetermined mask data from the mask ROM inputted to the ALU and outputting a second operation result on the destination bus;
• storing the second operation result in the second register;
• transferring M-bit data from the external memory to a memory data register connected to the first and second operand buses and the destination bus;
• and
• performing a third logical operation between the M-bit data from the memory data register and the predetermined mask data from the mask ROM inputted to the ALU, and outputting a third operation result to the destination bus.

A method of transferring N bits of a M-bit data stored in a first register of a microprocessor to an arbitrary M-bit data area of an external memory, where N and M are positive integers and N<M, comprising the steps of:

• retrieving and decoding an instruction from the external memory;
• generating a predetermined mask data stored in a mask ROM and outputting the predetermined mask data from the mask ROM to an arithmetic logic unit (ALU);
• performing a first logical operation on the M-bit data from the first register and the predetermined mask data from the mask ROM inputted into the ALU to generate a first operation result;
• outputting the first operation result via a destination bus and temporarily storing the first operation unit result in a second register, a first operand bus and a second operand bus each being coupled to said first and second registers, the mask ROM and the ALU with the mask ROM transferring the mask data from the mask ROM to the ALU via the first or second operand bus;
• and
• performing a second logical operation between the M-bit data from the memory data register and the predetermined mask data from the mask ROM inputted to the ALU to generate a second operation result which is stored in the memory data register via the destination bus.