Data bus arbiter for pipelined transactions on a split bus

A data bus arbiter for granting a data bus to one of a plurality of bus masters at a time, separately of an address bus associated therewith, comprising:

• logic for detecting the beginning of a bus cycle;
• logic for determining whether said detected bus cycle includes a request to use said data bus;
• logic for granting said data bus, in association with said logic for determining, to a first one of said plurality of bus masters which requests use of said data bus;
• a storage device for storing an identity of said first one of said plurality of bus masters, and for also storing an identity of at least a second one of said plurality of bus masters to be granted said data bus next, wherein said logic for granting grants said data bus to said second one of said plurality of bus masters after said first one of said plurality of bus masters has completed its data cycle;
• wherein said logic for granting comprises a plurality of pointers which store addresses associated with said identities of said first and second bus masters;
• and
• wherein said logic for granting increments one of said plurality of pointers in response to the detection of a start of a bus cycle which includes a request to use of said data bus.