Back to results
US 5,708,597 AGranted
Structure and method for implementing a memory system having a plurality of memory blocks
AssigneeXilinx, Inc.
InventorSteven H. Kelem
Life of this patent
Estimating the term…
Abstract
A memory system and method which allows a plurality of memory circuits to be operated independently as separate memories, or jointly as a single memory. Alternatively, the selected memory circuits are operated jointly and other memory circuits are operated independently. The configuration of the memory system can be varied dynamically during operation of the memory system.
Claims19
A memory system comprising:
- a first line set for receiving a first plurality of memory control signals;
- a second line set for receiving a second plurality of memory control signals;
- a first control line for receiving a split control signal having a first state and a second state;
- a first switching logic circuit coupled to the first line set, the second line set and the first control line;
- a first memory circuit;
- a second memory circuit;
- a third line set coupled between the first switching logic circuit and the first memory circuit;
- and
- a fourth line set coupled between the first switching logic circuit and the second memory circuit, wherein the first switching logic couples the first line set to the third line set when the split signal is in the first state, thereby routing the first memory control signals to the first memory circuit, and couples the second line set to the fourth line set, thereby routing the second memory control signals to the second memory circuit, and wherein the first switching logic circuit couples one of the first and second line sets to the third and fourth line sets when the split signal is in the second state.
6 more elements
A memory system comprising:
- a first memory circuit;
- a second memory circuit;
- a first control line for receiving a split control signal, the split control signal having a first state and a second state;
- means for accessing the first and second memory circuits in response to the split control signal, wherein the means for accessing accesses the first and second memory circuits independently when the split control signal is in the first state, and wherein the means for accessing accesses the first and second memory circuits jointly when the split control signal is in the second state.
1 more element
A method of operating a memory system comprising the steps of:
- providing a plurality of memory circuits;
- accessing the memory circuits independently in response to a first state of a first control signal;
- accessing the memory circuits jointly in response to a second state of the first control signal.
Dependencies are inferred from the claim text.