Shrinkage-matched circuit package utilizing low temperature co-fired ceramic structures

Abstract

A glass-ceramic substrate for encapsulating an electronic component, with at least two shrinkage control layers restricting shrinkage of the substrate during a co-firing process. The shrinkage control layers are chosen so that they have substantially the same shrinkage characteristics, during co-firing, as the buried electronic component. This results in substantially no differential shrinkage between the electronic component and the substrate, along predetermined directions, during co-firing. In addition, the thermal expansion coefficients of the substrate, shrinkage control layers and electronic component are chosen so that they substantially match, such that their thermal-induced contraction during the cooling phase of the co-firing process substantially match. In the preferred embodiment, the electronic component is buried within the layers of an LTCC structure. The shrinkage control layers are preferably implemented as Al.sub.2 O.sub.3 or TiO.sub.2 filled dielectric green tape layers on top and bottom LTCC layers. A buried capacitor LTCC package is specifically disclosed.

Dependencies are inferred from the claim text.