Method and apparatus for providing limiting transimpedance amplification

A limiting transimpedance amplifier comprising:

• a first amplifier stage having an input transistor and an output transistor, said first amplifier stage having a feedback resistor coupling an output of said output transistor to an input of said input transistor;
• a limiting diode coupled across said feedback resistor;
• a stabilization diode coupled to an output of said input transistor to compensate for feedback instability introduced into said amplifier stage by said limiting diode;
• and
• a stabilization voltage generator coupled to said stabilization diode to provide a stabilization voltage to said stabilization diode, said stabilization voltage generator including a second amplifier stage having substantially the same operating characteristics as said first amplifier stage, and wherein said first amplifier stage and said stabilization voltage generator are formed on the same semiconductor substrate.

A limiting transimpedance amplifier comprising:

• a first NPN transistor having an emitter coupled to ground, a base coupled to an input node of said amplifier, and a collector coupled to VCC by a load resistor;
• a second NPN transistor having an emitter coupled to ground by a current source, a base coupled to said collector of said first NPN transistor, and a collector coupled to Vcc, where said emitter is coupled to an output node of said amplifier;
• a feedback resistor coupling said output node to said input node;
• a limiting diode coupled in parallel with said feedback resistor to limit a range of output voltages on said output node;
• a stabilization diode coupled to said collector of said first NPN transistor to compensate for instability introduced by said limiting device;
• and
• a stabilization voltage generator coupled to said stabilization diode to provide a stabilization voltage to said stabilization diode, said stabilization voltage generator including:
• a third NPN transistor having an emitter coupled to ground and a collector coupled to Vcc by a load resistor;
• a fourth NPN transistor having an emitter coupled to ground by a current source, a base coupled to said collector of said third NPN transistor, and a collector coupled to Vcc;
• a second feedback resistor coupling said emitter of said fourth NPN transistor to a base of said third NPN transistor;
• and
• a second limiting diode coupled in parallel with said second feedback resistor;
• whereby said stabilization voltage is derived from said collector of said third NPN transistor.

A method for making an integrated circuit device including a limited transimpedance amplifier comprising the steps of:

• (a) manufacturing on a portion of a semiconductor substrate
• (1) a first amplifier stage having an input transistor and an output transistor, said first amplifier stage having a feedback resistor coupling an output of said output transistor to an input of said input transistor;
• (2) a limiting diode coupled across said feedback resistor;
• (3) a stabilization diode coupled to an output of said input transistor to compensate for feedback instability introduced into said amplifier stage by said limiting diode;
• and
• (4) a stabilization voltage generator coupled to said stabilization diode to provide a stabilization voltage to said stabilization diode, said stabilization voltage generator including a second amplifier stage having substantially the same operating characteristics as said first amplifier stage;
• (b) coupling said portion of a semiconductor substrate to a plurality of leads;
• and
• (c) packaging said portion of a semiconductor substrate to form an integrated circuit device.