Self-timed control circuit for self-resetting logic circuitry
AssigneeInternational Business Machines Corporation
InventorsChristopher McCall Durham, Peter Juergen Klim
Life of this patent
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Abstract
A self-timed control circuit for self-resetting CMOS logic circuitry provides handshaking between macros to ensure that all data inputted to a particular macro is maintained by the source macros until all data inputs have been received. A data output signal from a macro is maintained until the macro receives a complete signal from all receiving macros indicating that the receiving macros have received all data inputs supplied to them.
Claims14
A system for implementing handshaking of data signals, comprising:
- a first macro for providing a first data signal and a first valid signal;
- a second macro for providing a second data signal and a second valid signal;
- and
- means for maintaining said first and second data signals active until both of said first and second data signals have been received by a third macro and said means for maintaining selectively asserts a complete signal to the third macro in response to the first valid signal and the second valid signal.
A system for implementing handshaking of data signals, comprising:
- a first macro for providing a first data signal and a first valid bit;
- a second macro for providing a second data signal and a second valid bit;
- and
- means for maintaining said first and second data signals active until both of said first and second data signals have been received by a third macro and said means for maintaining selectively asserts a complete signal to the third macro in response to the first valid bit and the second valid bit, wherein each of said first, second, and third macros comprises a plurality of stages of domino logic circuitry.
A system for implementing handshaking of data signals, comprising:
- means for receiving a first data signal and a first valid signal from a first source;
- means for generating a complete signal in response to the first valid signal;
- means for receiving a second data signal from a second source;
- means for maintaining said first and second data signals active until the complete signal and both of said first and second data signals have been received by a circuit having a plurality of stages of domino logic;
- and
- means for causing said first and second sources to discontinue activations of said first and second data signals when both the complete signal and said first and second data signals have been received.
A system for implementing handshaking of data signals, comprising:
- a first source for providing a first data signal and a first valid signal;
- a second source for providing a second data signal;
- and
- means for maintaining said first and second data signals active until the first valid signal and both of said first and second data signals have been received by a destination which comprises a plurality of stages of domino logic circuitry which performs a logic function on said first and second data signals, the destination being coupled to the first source and the second source.
Dependencies are inferred from the claim text.