Method of forming a programmable non-volatile memory cell by providing a shielding layer over the gate sidewalls

A method of forming a floating gate transistor, comprising:

• forming a floating gate construction having opposing lateral sidewalls;
• providing opposing source and drain regions operably adjacent the floating gate construction;
• forming an oxide layer over the gate sidewalls;
• forming sidewall spacers over the oxide layer and outwardly of the gate sidewalls;
• forming a shielding layer over the sidewall spacers;
• and
• forming a dielectric layer over the shielding layer, the dielectric layer being of a different material than the shielding layer.

A method of forming a floating gate transistor, comprising:

• forming a floating gate construction having opposing lateral sidewalls;
• providing opposing source and drain regions operably adjacent the floating gate construction;
• forming an oxide layer over the gate sidewalls;
• forming a shielding layer over the oxide layer, the shielding layer comprising Si.sub.3 N.sub.4 having a thickness of about 50 Angstroms to about 200 Angstroms;
• forming sidewall spacers over the shielding layer and outwardly of the sidewalls;
• and
• forming a dielectric layer over the sidewall spacers, the dielectric layer being of a material different than the shielding layer, the dielectric layer selected from the group comprising BPSG and SiO.sub.2.

A method of forming a floating gate transistor, comprising:

• forming a floating gate construction having opposing lateral sidewalls;
• providing opposing source and drain regions operably adjacent the floating gate construction;
• forming an oxide layer over the gate sidewalls;
• forming sidewall spacers over the oxide layer and outwardly of the gate sidewalls;
• forming a shielding layer over the sidewall spacers, the shielding layer comprising Si.sub.3 N.sub.4 having a thickness of about 50 Angstroms to about 200 Angstroms;
• and
• forming a dielectric layer over the shielding layer, the dielectric layer being of a different material than the shielding layer, the dielectric layer selected from the group comprising BPSG and SiO.sub.2.

A method of forming a floating gate transistor, comprising:

• forming a floating gate construction having opposing lateral sidewalls;
• providing opposing source and drain regions operably adjacent the floating gate construction;
• forming an oxide layer over the gate sidewalls;
• forming a shielding layer over the oxide layer, the shielding layer comprising aluminum having a thickness of about 50 Angstroms to about 200 Angstroms;
• forming sidewall spacers over the shielding layer and outwardly of the sidewalls;
• and
• forming a dielectric layer over the sidewall spacers, the dielectric layer being of a material different than the shielding layer, the dielectric layer selected from the group comprising BPSG and SiO.sub.2.

A method of forming a floating gate transistor, comprising:

• forming a floating gate construction having opposing lateral sidewalls;
• providing opposing source and drain regions operably adjacent the floating gate construction;
• forming an oxide layer over the gate sidewalls;
• forming sidewall spacers over the oxide layer and outwardly of the gate sidewalls;
• forming a shielding layer over the sidewall spacers, the shielding layer comprising aluminum having a thickness of about 50 Angstroms to about 200 Angstroms;
• and
• forming a dielectric layer over the shielding layer, the dielectric layer being of a different material than the shielding layer, the dielectric layer selected from the group comprising BPSG and SiO.sub.2.