Voltage regulator for memory device

A circuit comprising:

• a programming selection circuit for selecting at least one electrically programmable non-volatile memory element to be programmed, said programming selection circuit including at least a first transistor and having a first voltage drop when turned on, said programming selection circuit being arranged for connection to a bit line of an electrically programmable non-volatile memory device;
• first and second voltage supply terminals;
• a voltage divider circuit coupled between said first and second voltage supply terminals and providing a reference voltage, said voltage divider circuit including a matched circuit having a first terminal coupled to a first node, the matched circuit having at least a second transistor, the matched circuit having a second voltage drop when said matched circuit is turned on, the second voltage drop being substantially equal to a selected ratio times the first voltage drop;
• a first controlled current generator connected between said first voltage supply terminal and the first node, said first controlled current generator being controlled by a first signal;
• an amplifier having an input terminal coupled to said voltage divider circuit to receive the reference voltage, and having an output terminal electrically connected to the programming selection circuit for providing a regulated voltage to the at least one non-volatile memory element when selected by said programming selection circuit, the memory element drawing a programming current through said programming selection circuit when the memory element is programmed;
• and
• a feedback loop for providing the first signal to said first controlled current generator, said feedback loop being coupled between said amplifier and said first controlled current generator, the first signal being substantially proportional to the programming current.

A circuit comprising:

• an array of electrically programmable memory cells;
• a plurality of bit lines coupled to said memory cells;
• first and second voltage supply terminals;
• a programming selection circuit for selecting memory cells to be programmed, said programming selection circuit being coupled to one of said bit lines, said programming selection circuit including a first transistor, said programming selection circuit having a first voltage drop when turned on;
• an amplifier having a source-follower output stage and an output terminal coupled to said programming selection circuit through the source-follower output stage, said amplifier providing an output voltage to said programming selection circuit for programming memory cells that are selected, the memory cells drawing a programming current through said selection circuit when said memory cells are programmed, the output voltage depending upon an input voltage provided to an input terminal of the amplifier;
• a voltage divider having a first circuit including a second transistor, said voltage divider being coupled between said first and second voltage supply terminals, said voltage divider being coupled to the input terminal of said amplifier at a first node to provide a reference voltage to the input terminal of said amplifier, the first circuit having a second voltage drop when turned on, the second voltage drop being substantially equal to a selected ratio times the first voltage drop of the programming selection circuit;
• a controlled current generator connected between said first voltage supply terminal and the first circuit, said controlled current generator being controlled by a first signal;
• and
• a feedback loop for providing the first signal to said controlled current generator, said feedback loop being coupled between said amplifier and said controlled current generator.

A circuit comprising:

• a programming selection circuit for selecting a memory element to be programmed in an electrically programmable non-volatile memory device, said programming selection circuit including a first transistor and having a first voltage drop when turned on, said programming selection circuit being connected to a power supply line for programming a state of the memory element;
• first and second voltage supply terminals;
• an output terminal connected to said programming selection circuit for programming the state of the memory element through said programming selection circuit;
• a voltage divider coupled between said first and second voltage supply terminals and providing a reference voltage, said voltage divider having a first circuit that is coupled to a first node at a first terminal of said first circuit, said first circuit having a second voltage drop when said first circuit is turned on, the second voltage drop being substantially equal to a selected ratio times the first voltage drop;
• a first controlled current generator connected between said first voltage supply terminal and the first node, said first controlled current generator being controlled by a first signal;
• an amplifier having an input terminal coupled to said voltage divider to receive the reference voltage and having an output stage coupled to said output terminal for providing a regulated voltage to the memory element when selected by said programming selection circuit, the memory element drawing a programming current through said programming selection circuit when the memory element is programmed, said output stage sensing the programming current;
• and
• a feedback loop coupled between said output stage and said first controlled current generator to provide the first signal to control said first controlled current generator, such that said first controlled current generator continuously adjusts current injected to the first node according to the programming current drawn.

A circuit comprising:

• a programming selection circuit for selecting at least one electrically programmable non-volatile memory element to be programmed, said programming selection circuit including at least a first transistor and having a first voltage drop when turned on, said programming selection circuit being arranged for connection to a bit line of an electrically programmable non-volatile memory device;
• first and second voltage supply terminals;
• a voltage divider circuit coupled between said first and second voltage supply terminals and providing a reference voltage, said voltage divider circuit including a matched circuit having a first terminal coupled to a first node, the matched circuit having at least a second transistor, the matched circuit having a second voltage drop when said matched circuit is turned on,, the second voltage drop being substantially equal to a selected ratio times the first voltage drop;
• a first controlled current generator connected between said first voltage supply terminal and the first node, said first controlled current generator being controlled by a first signal, whereby said first controlled current generator drives current through said matched circuit to induce said second voltage drop across said matched circuit;
• an amplifier having an input terminal coupled to said voltage divider circuit to receive the reference voltage, and an output terminal electrically connected to the programming selection circuit for providing a regulated voltage to the at least one non-volatile memory element when selected by said programming selection circuit, the memory element drawing a programming current through said programming selection circuit when the memory element is programmed;
• and
• a feedback loop for providing the first signal to said first controlled current generator, said feedback loop being coupled between said amplifier and said first controlled current generator, the first signal being substantially proportional to the programming current.

A circuit comprising:

• an array of electrically programmable memory cells;
• a plurality of bit lines coupled to said memory cells;
• first and second voltage supply terminals;
• a programming selection circuit for selecting memory cells to be programmed, said programming selection circuit being coupled to one of said bit lines, said programming selection circuit including a first transistor, said programming selection circuit having a first voltage drop when turned on;
• an amplifier having a source-follower output stage and an output terminal coupled to said programming selection circuit through the source-follower output stage, said amplifier providing an output voltage to said programming selection circuit for programming memory cells that are selected, the memory cells drawing a programming current through said selection circuit when said memory cells are programmed, the output voltage depending upon an input voltage provided to an input terminal of the amplifier;
• a voltage divider having a first circuit including a second transistor, said voltage divider being coupled between said first and second voltage supply terminals, said voltage divider being coupled to the input terminal of said amplifier at a first node to provide a reference voltage to the input terminal of said amplifier, the first circuit having a second voltage drop when turned on, the second voltage drop being substantially equal to a selected ratio times the first voltage drop of the programming selection circuit;
• a controlled current generator connected between said first voltage supply terminal and the first circuit, said controlled current generator being controlled by a first signal, whereby said controlled current generator drives current through said first circuit to induce said second voltage drop across said first circuit;
• and
• a feedback loop for providing the first signal to said controlled current generator, said feedback loop being coupled between said amplifier and said controlled current generator.