US 5,706,238 AGranted

Self current limiting antifuse circuit

AssigneeMicron Technology, Inc.

InventorsDouglas J. Cutter, Kurt D. Beigel, Adrian E. Ong, Fan Ho, Patrick J. Mullarkey, Dien S. Luong, Brett Debenham, Kim M. Pierce

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Abstract

An antifuse bank includes a bank of self-decoupling anti fuse circuits. The anti fuse circuits are programmed according to a pattern of address bits by blowing antifuses corresponding to bits of the address. The antifuses are blown by applying a high voltage across the antifuse. As each antifuse is blown, its resistance drops and current through the antifuse increases. The self-decoupling circuit detects the increased current flow and, when the anti fuse resistance is sufficiently low, limits current flow through the anti fuse. The antifuse thus does not load the high voltage source as other antifuses are blown.

Claims12

Dependent claims

A self-decoupling integrated antifuse circuit, comprising:

a plurality of test nodes;
a voltage source having an output operative to provide a selected voltage;
a plurality of antifuses coupled between respective ones of the test nodes and the voltage source, each of the antifuses having an antifuse impedance each antifuse being configured to blow from a high resistance to a lower resistance in response to the selected voltage;
a plurality of sense circuits, each sense circuit having a sense input coupled to a respective one of the test nodes and a sense output, each sense circuit being configured to provide a signal indicative of the antifuse impedance being outside of a selected range;
and
a plurality of isolation circuits each having a control input coupled to a respective one of the sense circuit outputs, each of the isolation circuits being configured to limit current flow through the respective antifuse in response to the signal indicative of the antifuse impedance.

3 more elements

A self-decoupling address detection circuit, comprising:

a blowing voltage input;
a latch circuit having a supply input coupled to a supply voltage, a set input, a latch output terminal and a latch control input terminal, wherein the latch circuit is responsive to switch from a first latch state in which the latch circuit provides a first latch signal at the latch output terminal to a second latch state in which the latch circuit provides a second latch signal at the latch output terminal in response to a selected voltage at the latch control input terminal;
an antifuse coupled between the blowing voltage input and the latch control input terminal, the antifuse being operative to blow in response to a fuse blowing voltage applied across the antifuse;
and
a decoupling circuit between the latch control input terminal and a reference potential, the decoupling circuit having a decoupling input coupled to the latch output terminal, the decoupling circuit being configured to provide a current path from the latch control input terminal to the reference potential in response to the first latch signal at the decoupling input and to block current flow from the latch control input terminal to the reference potential in response to the second latch signal at the decoupling input.

2 more elements

Dependencies are inferred from the claim text.