US 5,706,001 AGranted

Run-length decoding apparatus for use in a video signal decoding system

AssigneeDaewoo Electronics Co., Ltd.

InventorYoung-Seok Sohn

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Abstract

A run-length decoding apparatus, for use in a video signal decoding system, for decoding a run level coded video signal to provide decoded video signal comprises an address generator, receiving the run data, for generating a write address denoting a memory location for storing the level data, a counter, responsive to a clock signal, for generating a read address for sequentially addressing the memory locations from an upper most memory location to a lower most memory location, and memory, having a number of memory locations, for storing the level data based on the write address, and for generating the decoded data stored in the memory locations based on the read addresses to thereby provide the decoded video signal.

Claims6

Dependent claims

A run-length decoding apparatus, for use in a video signal decoding system, for decoding a run level coded video signal to provide a decoded video signal, wherein the run level coded video signal is divided into a plurality of blocks, each block having a multiplicity of run-level pairs and each pair having run data and level data, which comprises:

means, receiving the run data, for generating a write address denoting a memory location for storing the level data;
means, responsive to a clock signal, for generating a read address for sequentially addressing the memory location from an upper most memory location to a lower most memory location;
means for generating the clock signal;
and
first memory means, having a number of memory locations, for storing the level data based on the write address, and for generating the decoded data stored in the memory locations based on the read addresses to thereby provide the decoded video signal.

2 more elements

The apparatus according to claim it further comprising second memory means having the number of memory locations for storing the level data based on the write address, and for generating the decoded data stored in the memory locations based on the read addresses to thereby provide the decoded video signal, and coupling means, in response to a block start signal representing the start of a block, for alternately relaying the write address or read addresses to the first or the second memory means.

Dependencies are inferred from the claim text.