Apparatus for programmable dynamic termination
AssigneeCypress Semiconductor Corporation
InventorKok-Kean Yap
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Abstract
The present invention provides a device for terminating a data bus. The present invention provides the proper termination without the use of external discrete components. The device can be programmed, at the chip level, to produce particular termination resistances that are commonly used. The present invention termination device uses a minimum of power dissipation which may be useful in applications that require minimum power consumption.
Claims18
A device for terminating a data bus comprising:
- one or more termination elements each having (i) a load output, (ii) a bus input and (iii) a plurality of control inputs, each of said elements presents one of a plurality of resistances at each of said load outputs in response to said plurality of control inputs;
- and
- an input enable that is at either (i) a first digital state that enables said plurality of resistances or (ii) a second digital State that prevents any of said plurality of resistances from being presented at said load outputs.
A device for terminating a data bus comprising:
- one or more termination elements each having (i) a load output, (ii) a bus input and (iii) a plurality of control inputs, each of said elements presents one of a plurality of resistances at each of said load outputs in response to said plurality of control inputs;
- a plurality of transistors wherein at least two of said plurality of transistors provide a first resistance path and at least two of said plurality of transistors provide a second resistance path;
- a plurality of pass gates wherein at least one of said plurality of pass gates has a gate coupled to one of said plurality of control inputs to enable said first resistance path to produce one of said plurality of resistances;
- and
- another one of said plurality of pass gates has a gate coupled to another one of said plurality of control signals to enable said second resistance path to produce another one of said plurality of resistances.
The device according to claim, 13 wherein said plurality of transistors are n-channel MOS transistors.
Dependencies are inferred from the claim text.