Integrated circuits and SRAM memory cells

An integrated circuit comprising:

• a first electrically insulating material layer having an outer surface;
• an electrically insulative pillar ring extending substantially vertically outward of the first layer, the pillar ring having opposing inner and outer substantially vertical side surfaces;
• an elongated resistor, the resistor comprising a layer of semiconductive material which serpentines over the first layer outer surface and the pillar ring vertical surfaces to form a container shape resistor within the pillar ring;
• an electrically conductive first node in electrical connection with the resistor on the inside of the insulative pillar ring;
• and
• an electrically conductive second node in electrical connection with the resistor on the outside of the insulative pillar ring.

An SRAM cell comprising:

• a first pull down transistor having a gate, a source and a drain;
• a second pull down transistor having a gate, a source and a drain;
• the gate of the first pull down transistor being electrically coupled to the drain of the second pull down transistor;
• the gate of the second pull down transistor being electrically coupled to the drain of the first pull down transistor;
• a Vcc node;
• a first resistor electrically coupled with the Vcc node;
• a second resistor electrically coupled with the Vcc node;
• the drain of the first pull down transistor being electrically coupled through the first resistor to the Vcc node;
• the drain of the second pull down transistor being electrically coupled through the second resistor to the Vcc node;
• and
• at least one of the first and second resistors comprising:
• a first electrically insulating material layer having an outer surface;
• an insulative pillar ring extending substantially vertically outward of the first layer, the pillar ring having opposing inner and outer substantially vertical side surfaces;
• an elongated resistor, the resistor comprising a layer of semiconductive material which serpentines over the first layer outer surface and the pillar ring vertical surfaces to form a container shape resistor within the pillar ring;
• an electrically conductive first node in electrical connection with the resistor on the inside of the insulative pillar ring;
• and
• an electrically conductive second node in electrical connection with the resistor on the outside of the insulative pillar ring.

An integrated circuit comprising:

• a first electrically insulating material layer having an outer surface;
• an electrically insulative pillar extending outward of the first layer, the pillar having opposing substantially vertical side surfaces;
• an elongated resistor, the resistor comprising a layer of semiconductive material which overlays the first layer outer surface and overlays the pillar vertical surfaces;
• an electrically conductive first node in electrical connection with the resistor on one side of the insulative pillar;
• and
• an electrically conductive second node in electrical connection with the resistor on the other side of the insulative pillar.

An integrated circuit comprising:

• a first electrically insulating material layer having an outer surface;
• an electrically insulative pillar ring extending outward of the first layer, the pillar ring having opposing inner and outer substantially vertical side surfaces;
• an elongated resistor, the resistor comprising a layer of semiconductive material which overlays the first layer outer surface and overlays the pillar ring vertical surfaces to form a container shape resistor within the pillar ring;
• an electrically conductive first node in electrical connection with the resistor on the inside of the insulative pillar ring;
• and
• an electrically conductive second node in electrical connection with the resistor on the outside of the insulative pillar ring.