US 5,705,420 A · Method of producing a fin-shaped capacitor

Abstract

A method of forming a structure having a contact hole includes the steps of (a) forming an insulating layer on a first conductive layer, (b) forming a second conductive layer on the insulating layer, (c) forming an opening in the second conductive layer, (d) forming a conductive sidewall around an inner wall of the first conductive layer defining the opening, (e) selectively etching the insulating layer in a state where the second conductive layer and the conductive sidewall function as etching masks, so that the contact hole having a width smaller than that of the opening and defined by the conductive sidewall is formed, and the first conductive layer is exposed through the contact hole, and (f) removing the second conductive layer and the conductive sidewall.

Claims19

Dependent claims

A method of producing a stacked-type capacitor in a dynamic random access memory comprising the steps of:

(a) forming an insulating layer on a semiconductor substrate having a diffusion region;
(b) forming a first conductive layer having an inner wall defining a first opening with a width on said insulating layer;
(c) forming a conductive sidewall having an outer surface contacting the inner wall of said first conductive layer defining said first opening, said conductive sidewall defining a second opening having a width smaller than the width of said first opening;
(d) selectively etching said insulating layer using said first conductive layer and said conductive sidewall as etching masks to expose said diffusion region through a contact hole formed in said insulating layer and having a width substantially identical to the width of said second opening;
(e) forming a second conductive layer on said first conductive layer, said conductive sidewall and said diffusion region exposed through said contact hole;
(f) patterning said first conductive layer and said second conductive layer into a shape of a storage electrode of said stacked-type capacitor;
(g) forming a dielectric film around an exposed surface of said storage electrode;
and
(h) forming a cell plate around said storage electrode covered by said dielectric film.

6 more elements

A method of producing a stacked-type capacitor in a dynamic random access memory comprising the steps of:

(a) forming an insulating layer on a semiconductor substrate having a diffusion region;
(b) forming a first conductive layer having an inner wall defining a first opening with a width on said insulating layer;
(c) forming a conductive sidewall having an outer surface contacting the inner wall of said first conductive layer defining said first opening, said conductive sidewall defining a second opening having a width smaller than the width of said first opening;
(d) selectively etching said insulating layer using said first conductive layer and said conductive sidewall as etching masks to expose said diffusion region through a contact hole formed in said first insulating layer and having a width substantially identical to the width of said second opening;
(e) forming a second conductive layer on said first conductive layer, said conductive sidewall and said diffusion region exposed through said contact hole;
(f) forming, on said second conductive layer, a second insulating layer having a third opening with a width substantially identical to the width of said first opening;
(g) forming a third conductive layer on said second insulating layer and said second conductive layer through said third opening;
(h) patterning said first, second and third conductive layers and said second insulating layer into a shape of a storage electrode of said stacked-type capacitor, the storage electrode having an exposed surface;
(i) isotropically etching to remove said second insulating layer;
(j) forming a dielectric film around the exposed surface of said storage electrode;
and
(k) forming a cell plate around said storage electrode covered by said dielectric film.

9 more elements

A method of producing a stacked-type capacitor in a dynamic random access memory comprising the steps of:

(a) forming an insulating layer on a semiconductor substrate having a diffusion region;
(b) forming a plurality of stacked-layer structures, a lowermost one of said stacked-layer structures being formed on said first insulating layer, each of said stacked-layer structures having a spacer layer and a first conductive layer;
(c) forming a first opening having a width in said stacked-layer structures except said spacer layer of said lowermost one of said stacked-layer structures;
(d) forming a conductive sidewall around an inner wall of said stacked-layer structures defining said first opening, said conductive sidewall defining a second opening having a width smaller than the width of said first opening;
(e) selectively etching said spacer layer of the lowermost one of said stacked-layer structures and said first insulating layer using said first conductive layer of an uppermost one of said stacked layer structures and said conductive sidewall as masks to expose said diffusion region through a contact hole formed in said spacer layer of the lowermost one of said stacked-layer structures and said first insulating layer;
(f) forming a second conductive layer on said first conductive layer of the uppermost one of said stacked-layer structures, said conductive sidewall and said diffusion region exposed through said contact hole;
(g) patterning said second conductive layer and said stacked-layer structures except said spacer layer of the lowermost one of said stacked-layer structures into a shape of a storage electrode of said stacked-type capacitor;
(h) isotropically etching said spacer layer of each of said stacked-layer structures to remove said spacer layer of each;
(i) forming a dielectric film around said storage electrode;
and
(j) forming a cell plate around said storage electrode covered by said dielectric film.

8 more elements

A method of producing a stacked-type capacitor in a dynamic random access memory comprising the steps of:

(a) forming a first insulating layer on a semiconductor substrate having a diffusion region;
(b) forming a plurality of stacked-layer structures, a lowermost one of said stacked-layer structures being formed on said first insulating layer, each of said stacked-layer structures having a spacer layer and a first conductive layer;
(c) forming a first opening having a width in said stacked-layer structures;
(d) forming a conductive sidewall around an inner wall of said stacked-layer structures defining said first opening, said conductive sidewall defining a second opening having a width smaller than the width of said first opening;
(e) selectively etching said first insulating layer using said first conductive layer of an uppermost one of said stacked layer structures and said conductive sidewall as masks to expose said diffusion region through a contact hole formed in said first insulating layer;
(f) forming a second conductive layer on said first conductive layer of the uppermost one of said stacked-layer structures, said conductive sidewall and said diffusion region exposed through said contact hole;
(g) patterning said second conductive layer and said stacked-layer structures into a shape of a storage electrode of said stacked-type capacitor;
(h) isotropically etching said spacer layer of each of said stacked-layer structures to remove said spacer layer;
(i) forming a dielectric film around said storage electrode;
and
(j) forming a cell plate around said storage electrode covered by said dielectric film.

8 more elements

A method of producing a stacked-type capacitor in a dynamic random access memory, comprising the steps of:

(a) forming a first insulating layer on a semiconductor substrate having a diffusion region;
(b) forming a first conductive layer on said first insulating layer;
(c) forming a second insulating layer having an inner wall defining a first opening with a width on said first conductive layer;
(d) forming an insulating sidewall having an outer surface contacting the inner wall of said first insulating layer defining said first opening, said insulating sidewall defining a second opening having a width smaller than the width of said first opening;
(e) selectively etching said first conductive layer using said second insulating layer and said insulating sidewall as etching masks;
(f) selectively etching said first insulating layer using said first conductive layer as an etching mask, while removing said second insulating layer and said insulating sidewall, to expose said diffusion region through a contact hole formed in said first insulating layer and having a width substantially identical to the width of said second opening;
(g) forming a second conductive layer on said first conductive layer and said diffusion region exposed through said contact hole;
(h) patterning said first and second conductive layers into a storage electrode of said stacked-type capacitor;
(i) forming a dielectric film around an exposed surface of said storage electrode;
and
(j) forming a cell plate around said storage electrode covered by said dielectric film.

8 more elements

Dependencies are inferred from the claim text.

Method of producing a fin-shaped capacitor

Life of this patent

Method of producing a fin-shaped capacitor

Life of this patent

Abstract

Claims19