Method of making buried gate insulator field effect transistor

A method of manufacturing a buried gate field effect transistor comprising the steps of:

• forming a barrier layer having a window on a single crystal layer of a first semiconducting material;
• forming a second layer of a second semiconducting material within said window;
• forming in a portion of said second layer a gate insulator comprising a compound of said second semiconducting material adjacent to said single crystal layer to define a gate region within said second layer;
• defining a barrier sidewall structure about said gate region in said gate insulator;
• and
• forming a source region and a drain region within said single crystal layer,
• wherein said gate region is vertically aligned with a portion of said single crystal layer between said source region and said drain region;
• and
• wherein said semiconductor is selected from the group consisting of carbon, germanium, silicon carbide, and the non-silicon compound semiconductors.

A method of manufacturing a buried gate field effect transistor comprising the steps of:

• forming a layer of a semiconducting material;
• forming a source and a drain in said layer;
• forming a gate insulator comprising a compound of said semiconductor material in said layer adjacent to said source and said drain;
• and
• forming a gate within said layer adjacent to said gate insulator wherein said gate is vertically aligned with a portion of said layer between said source and said drain, and wherein said semiconductor material is selected from the group consisting of carbon, germanium, silicon carbide, and the non-silicon compound semiconductors.