Electrically isolated collimator and method
AssigneeMicron Technology, Inc.
InventorsShane P. Leiphart, Richard L. Elliot
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsShane P. Leiphart, Richard L. Elliot
Estimating the term…
Disclosed is a collimator, where the collimator is mounted within a sputter chamber and is interposed between a sputter target and a wafer to be coated with a thin film of the sputtered material. The collimator of the present invention is preferably mounted within the sputter chamber in an insulated manner so that the collimator is electrically insulated from the chamber and the collimator is able to take on a floating electrical potential of the plasma generated within the sputter chamber. The wafer is preferably rf-biased to effectuate a selective, reduced-rate sputtering of portions of the deposited film to inhibit premature pinch off by the film of recessed areas of the wafer.
A sputter coating apparatus for sputter coating a semiconductor wafer, the apparatus comprising:
A method of sputter deposition of a thin film on a semiconductor wafer in an evacuable chamber, the method comprising:
An apparatus for sputter deposition of a material on a semiconductor wafer, the apparatus comprising:
An apparatus for sputter deposition of a material on a semiconductor wafer, the apparatus comprising:
An apparatus for sputter deposition of a material on a semiconductor wafer, the apparatus comprising:
A method for sputter deposition of a material on a semiconductor wafer, the method comprising:
A method for sputter deposition of a material on a semiconductor wafer including high aspect-ratio features on the surface thereof, the method comprising:
A method for sputter deposition of a material on a semiconductor wafer including recesses in the surface thereof, comprising:
A method for sputter deposition of a target material on a semiconductor wafer, the method comprising:
A method for sputter deposition of a target material on a semiconductor wafer, the method comprising:
A method for sputter deposition of a target material on a semiconductor wafer, the method comprising:
Dependencies are inferred from the claim text.