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US 5,704,056 AGranted
Cache-data transfer system
AssigneeFujitsu Limited
InventorsRyuji Fujita, Hirohide Sugahara
Life of this patent
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Abstract
The present invention provides a cache-data transfer system improving a cache-hit rate by making a block size of the external cache memory longer than the block size of an internal cache memory. The system makes a block size of the external cache memory longer than a block size of the internal cache memory by inserting a data transfer process which transfers a data from the storage means to only the external cache memory during a data transfer process from the storage means to the internal cache memory and the external cache memory.
Claims10
A cache-data transfer system comprising:
- storage means for storing programs and data to be processed;
- a microprocessor operated in accordance with the programs and using the data, said microprocessor comprising an internal cache memory comprising a number of first blocks, each of the first blocks comprising M words, said internal cache memory receiving and storing the data consecutively stored in the storage means, wherein M is an integer;
- an external cache memory coupled to the microprocessor and comprising a number of second blocks, each of the second blocks comprising N words, said external cache memory receiving and storing the data consecutively stored in the storage means, wherein N is an integer larger than M;
- and
- memory control means for controlling a data transfer process transferring data from the storage means to the internal cache memory and the external cache memory according to the following sequence:
- first, said memory control means consecutively transferring data corresponding to up to M-1 words from the storage means to one of said first blocks of the internal cache memory and to one of said second blocks of the external cache memory leaving a space of at least one word-unit in said one of said first blocks and said one of said second blocks empty,
- second, said memory control means consecutively transferring data corresponding to up to N-M words from the storage means only to said one of said second blocks of the external cache memory, and
- third, said memory control means consecutively transferring data corresponding to at least one word to the empty word-unit of said one of said first blocks of the internal cache memory and that of said one of said second blocks of the external cache memory,
- said microprocessor executing a next data transfer process after said empty word-unit in said one of said first blocks of the internal cache memory receives the data from the storage means.
6 more elements
Dependencies are inferred from the claim text.