Apparatus and method for testing a program memory for a one-chip microcomputer
AssigneeLG Semicon Co., Ltd.
InventorYoung Seung Park
Life of this patent
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AssigneeLG Semicon Co., Ltd.
InventorYoung Seung Park
Estimating the term…
In an apparatus of testing a program memory for a one-chip microcomputer which allows the test of program memory mounted within the microcomputer and the test of another function block, thereby reducing test time, and the method therefor, the testing apparatus includes a central processing unit (CPU) for controlling the overall system, an interrupt controller for controlling an interrupt function, a data memory for storing information on data, a peripheral unit connected to a main system for performing input and output functions, a program memory for storing each program information having a predetermined pattern, an address counter for setting address of program memory via an address bus line switched by a first switch, a check-sum calculator for calculating and storing the entire data of the set address of program memory via a data bus line switched by a second switch, a test mode switch for controlling first and second switches, and address counter, and an input/output port for inputting or outputting port outputs of the entire data of check-sum calculator and data of the overall system. Tests for various functional blocks except the program memory are simultaneously performed while performing a test for the program memory. Therefore, the test time and the test cost due to large program memories can be reduced.
An apparatus for testing a program memory of a microcomputer, the microcomputer including a central processing unit, an interrupt controller for controlling an interrupt function, a data memory for storing information and data, a peripheral unit for performing input and output functions, an address bus line, a data bus line, and an input/output port for inputting and outputting data, the apparatus comprising:
A method for testing a program memory of a microcomputer, the microcomputer including a central processing unit, an interrupt controller for controlling an interrupt function, a data memory for storing data, a peripheral unit for performing input and output functions, a program memory for storing information therein, an address bus line, a data bus line, and an input/output port for inputting and outputting data, the method comprising the steps of:
Dependencies are inferred from the claim text.