Back to results
US 5,703,822 AGranted
Serial access memory device including memory sections having different latencies
AssigneeNEC Corporation
InventorHiroaki Ikeda
Life of this patent
Estimating the term…
Abstract
In a serial access memory device, a first memory section divided into a plurality of first segments and a second memory section divided into a plurality of second segments are provided. A first latency of the first memory section is shorter than a second latency of the second memory section. The serial accesses of segments of the first and second memory sections are simultaneously initiated. The serial access of segments of the first memory section is completed within a time period corresponding to the second latency.
Claims7
A serial access memory device comprising:
- a first memory section divided into a plurality of first segments and having a first latency;
- a second memory section divided into a plurality of second segments and having a second latency longer than said first latency;
- first addressing means, connected to said first memory section, for sequentially generating first addresses to access the first segments of said first memory section;
- second addressing means, connected to said second memory section, for sequentially generating second addresses to access the second segments of said second memory section;
- and
- control means, connected to said first and second addressing means, for simultaneously initiating operations of said first and second addressing means and completing the operation of said first addressing means within a time period corresponding to said second latency.
3 more elements
Dependencies are inferred from the claim text.