Overcharge/discharge voltage regulator for EPROM memory array

A method for high speed reading of data from an erasable programmable read-only memory (EPROM) having a memory array which is programmed based on device status at intersections of rows and columns of the array to store data therein as 0's and 1's, the method comprising the steps of:

• quickly overdriving a row of the array having an associated effective capacitance by overcharging thereof to substantially the maximum level of a supply voltage of the EPROM in one clock cycle, said maximum level exceeding the programming threshold voltage of a selected memory element of said row to be read,
• thereupon discharging the effective capacitance to a predetermined voltage level below said maximum level of the supply voltage in the next clock cycle, and then reading the status and data content of the selected memory element.

A high speed erasable programmable read-only memory (EPROM) having a memory array in which data is stored by programming memory elements at intersections of rows and columns of the array, said EPROM comprising:

• means for capacitively overcharging a row of the array containing a memory element to be read to a voltage corresponding to substantially the maximum level of the supply voltage of the EPROM, possibly exceeding the programmed threshold voltage of said memory element to be read,
• means for rapidly discharging said row voltage to a predetermined level below said maximum level of the supply voltage, and
• means for thereupon reading said memory element by passing a current therethrough.