Drive circuit for displaying seven-segment decimal digit

Abstract

A drive circuit for displaying the partition symbol intermittently comprising at least a pair of buffers, a plurality of display units of seven-segment, a partition symbol display buffer, a control circuit, a display unit of partition symbol, is provided. The pair of buffers store a set of signals. Each of the plurality of display units of seven-segment includes a first display portion and a second display portion, and, responsive to the set of signals, the first display portion and the second display portion are enabled to display. The partition symbol display buffer has an output value. The control circuit resets and sets the partition symbol display buffer in accordance with a predetermined manner. The display unit of partition symbol, in response to the output value, displays the partition symbol intermittently.

Dependencies are inferred from the claim text.