Offset cancel circuit and offset cancel system using the same

An offset cancel system comprising:

• two input nodes to which first and second potentials are supplied in a first period from a device having an offset voltage, and to which third and fourth potentials are supplied in a second period, the first potential differing from the second potential, the third potential being substantially the same as the fourth potential;
• an output node;
• an amplifier circuit having inputs and outputs, the inputs of said amplifier circuit being electrically coupled to said two input nodes, said amplifier circuit providing fifth and sixth potentials in the first period in response to the first and second potentials, said amplifier circuit providing seventh and eighth potentials in the second period in response to the third and fourth potentials;
• a level shifting unit having inputs, an output and a level shifting node, the inputs of said level shifting unit being electrically coupled to the outputs of said amplifier circuit, the output of said level shifting unit being electrically coupled to said output node, said level shifting unit supplying in the first period a ninth potential to the level shifting node in response to a first level of a mode changing signal, said level shifting unit providing in the first period a tenth potential in response to the fifth, sixth and ninth potentials, said level shifting unit supplying in the second period an eleventh potential to the level shifting node in response to a second level of the mode changing signal, said level shifting unit providing in the second period a twelfth potential in response to the seventh, eighth and eleventh potentials, wherein the ninth potential differs from the eleventh potential;
• and
• an AD converter electrically connected to said output node for outputting a first value in response to the tenth potential and outputting a second value in response to the twelfth potential, an arithmetic device being electrically connected to the AD converter for performing computation in response to the first and second value.

A method for adjusting an offset voltage, comprising the steps of:

• supplying in a first period first and second potentials provided from a device having an offset voltage to inputs of an amplifier circuit, said first potential differing from said second potential;
• outputting in the first period third and fourth potentials in response to said first and second potentials by said amplifier circuit;
• supplying in the first period a fifth potential to a level shifting node of a level shifting unit in response to a first level of a mode changing signal by said level shifting unit;
• outputting in the first period a sixth potential in response to said third, fourth and fifth potentials by said level shifting unit;
• supplying in a second period seventh and eighth potentials to said inputs of said amplifier circuit, said seventh potential being substantially the same as said eighth potential;
• outputting in the second period ninth and tenth potentials in response to said seventh and eighth potentials by the amplifier circuit;
• supplying in the second period an eleventh potential to said level shifting node of said level shifting unit in response to a second level of the mode changing signal by said level shifting unit, said fifth potential differing from said eleventh potential;
• outputting in the second period a twelfth potential in response to said ninth, tenth and eleventh potentials by said level shifting unit;
• outputting a first value in response to said sixth potential and outputting a second value in response to said twelfth potential;
• and
• performing a computation in response to said first and second values.