Circuitry that detects a phase difference between a first, base, clock and a second, derivative, clock derived from the base clock

Abstract

A phase detection circuit detects a phase relationship between a first clock signal, characterized by transitions of a given polarity (e.g., rising edges) at a first frequency, and a second clock signal, characterized by transitions of the given polarity at a second frequency that is an integer multiple of the first frequency. Transition indication circuitry generates a transition indication signal responsive to transitions, of the given polarity, of the second clock signal. The transition indication signal includes a transition indication (e.g., a pulse) corresponding to each n.sup.th transition, of the given polarity, of the second clock signal and at a phase that is selectable relative to the first clock signal in response to a transition indication control signal. Sampling circuitry (e.g., one or more latches) samples the transition indication signal responsive to each transition, of the given polarity, of the first clock signal to generate a transition indication sample. Coincidence determination circuitry determines, responsive to the transition indication sample signal and to the second clock signal, if the transition indication coincides with a transition, of the given polarity, of the second clock signal. Transition indication control circuitry generates the transition indication control signal responsive to the determination by the coincidence determination circuitry. The transition indications of the transition indication signal, when the transition indication signal is at a steady state, provides an indication of the phase relationship between the first clock signal and the second clock signal.

Dependencies are inferred from the claim text.