Integrated circuit chip formed from processing two opposing surfaces of a wafer

An electronic assembly, comprising:

• a circuit carrying substrate having first and second pluralities of contacts formed thereon;
• and
• an integrated circuit chip mounted on the circuit carrying substrate, the integrated circuit chip comprising:
• an integrated circuit die having first and second opposing surfaces;
• a first integrated circuit formed on the first surface, the first integrated circuit having a first plurality of terminals coupled thereto for interconnection with the first plurality of contacts, wherein the first plurality of terminals is formed on the first surface;
• and
• a second integrated circuit formed on the second surface, the second integrated circuit electrically isolated from the first integrated circuit, the second integrated circuit having a second plurality of terminals coupled thereto for interconnection with the second plurality of contacts, wherein the second plurality of terminals is formed on the first surface and coupled to the second integrated circuit via plated holes formed through the integrated circuit die, wherein the second plurality of terminals is electrically isolated from the first plurality of terminals and the first integrated circuit.

An electronic device, comprising:

• a circuit carrying substrate having first and second pluralities of contacts formed thereon;
• circuitry for processing electrical signals mounted on the circuit carrying substrate, the circuitry including at least one integrated circuit chip comprising:
• an integrated circuit die having first and second opposing surfaces;
• a first integrated circuit formed on the first surface, the first integrated circuit having a first plurality of terminals coupled thereto for interconnection with the first plurality of contacts, wherein the first plurality of terminals is formed on the first surface;
• and
• a second integrated circuit formed on the second surface, the second integrated circuit electrically isolated from the first integrated circuit, the second integrated circuit having a second plurality of terminals coupled thereto for interconnection with the second plurality of contacts, wherein the second plurality of terminals is formed on the first surface and coupled to the second integrated circuit via plated holes formed through the integrated circuit die, wherein the second plurality of terminals is electrically isolated from the first plurality of terminals and the first integrated circuit.