Block for polishing a wafer during manufacture of integrated circuits

A block for removing a portion of a wafer using relative motion between said block and said wafer, wherein said wafer has a plurality of photolithographic images formed on a surface of said wafer, each of said photolithographic images comprising a slow-polishing region having the slowest rate of material removal in said photolithographic image,

• wherein said block has an eroding surface for eroding said wafer, said eroding surface having an area between a maximum area and a minimum area,
• wherein the smallest dimension of said minimum area is greater than twice the largest side of a triangle, said triangle being the largest possible triangle having a slow-polishing region at each corner such that said triangle excludes all slow-polishing regions on said wafer other than said slow-polishing regions at said corners, and said minimum area being larger than an area of a photolithographic image, and
• wherein the maximum area is the largest area possible for said eroding surface such that a curvature of said eroding surface deviates from a curvature of said wafer surface by a predetermined amount.

A block for polishing a wafer using relative motion between said block and said wafer, said wafer having a plurality of photolithographic images to be polished, wherein said block has an eroding surface for polishing said photolithographic images, said eroding surface having an area, said area being:

• larger than an area of one of said photolithographic images;
• and
• smaller than an area of said wafer.