Cell architecture for mixed signal applications

An integrated circuit cell structure comprising:

• a semiconductor substrate in which are located a plurality of columns of semiconductor material of a first conductivity type and a plurality of columns of semiconductor material of a second conductivity type;
• the substrate having one of the first and second plurality of columns adjacent to each other and mirroring the next pair of columns such that the conductivity of the first of the next pair of columns is the same as the last of the first pair of columns;
• active areas formed within the columns to which can be connected conductive material, thereby forming active regions;
• each of the active regions including a contact point region, the contact point region including an extension portion substantially adjacent to an end of each of the active areas for allowing for the connection outside the active regions to avoid interference with other connections to the structure;
• and
• tap regions formed outside said columns, each of the tap regions being associated with one pair of the columns, at least one of the tap regions being capable of accommodating a plurality of electrically isolated metal lines, each of the tap regions having the opposite conductivity as the columns in which they are adjacent to and to which can be connected conductive material, the tap regions being doped with an opposite material than their respective columns thereby allowing current and voltage characteristics of the columns to be controlled;
• wherein the active areas and the tap regions adjacent to one of the columns are placed so as to form a plurality of adjacent cells, each cell comprising a first active area with an associated tap region located adjacent thereto and a second active area and wherein pairs of columns are situated to allow common conductivity columns to share tap regions.

An integrated circuit cell structure comprising:

• a semiconductor substrate in which are located a plurality of p-channel semiconductor material and a plurality of columns of n-channel semiconductor material, the substrate having one of the plurality of p-channel columns adjacent to an n-channel column to form a first column pair, the substrate further having the next pair of columns positioned such that the next pair of columns mirror the first column such that the conductivity of the first column of next column pair is the same as the last column of the first column pair;
• active areas formed within the columns to which can be connected conductive material, thereby forming active regions, each of the active regions including a contact point region, the contact point region including a plurality of contacts, the contact point region including an extension portion substantially adjacent to an end of each of the active regions for allowing for connection outside the active regions to avoid interference with other connections to the structure;
• and
• tap regions formed outside the column pairs, each of the tap regions being associated with one column pair, each of the tap regions having the opposite conductivity as the column it is adjacent to and to which can be connected conductive material, at least one of the tap regions being capable of accommodating a plurality of electrically isolated metal lines, the tap regions further being heavily doped with conductive material of the opposite type than that of the column it is adjacent to thereby allowing current and voltage characteristics of the columns to be controlled,
• wherein the active areas and tap regions adjacent to one of the columns are placed so as to form a plurality of adjacent cells, each cell comprising a first active area with an associated tap region located adjacent thereto and a second active area and wherein pairs of columns are situated to allow common conductivity columns to share tap regions.