Structure to reduce stress in multilayer ceramic substrates
AssigneeInternational Business Machines Corporation
InventorsJohn J. Garant, Richard F. Indyk
Life of this patent
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Abstract
A multilayer ceramic substrate for microelectronics includes stress relief pads to reduce stress in the vicinity of functional vias penetrating through multiple ceramic layers. The stress relief pads are located only on the major surface of a ceramic layer and accordingly do not prevent wiring from being placed directly below the stress relief pads on the bottom surface of the same layer or the top surface of the imediately underlying layer. The invention also includes the method of making the multilayer ceramic substrate with stress relief pads.
Claims10
A multilayer ceramic substrate for microelectronics comprising:
- a plurality of ceramic layers arranged in sequential layers, each layer having a major surface;
- a plurality of electrically conductive wires formed on the major surfaces of the ceramic layers;
- a plurality of electrically conductive functional vias, each functional via extending through one or more of the ceramic layers and electrically connecting to one or more of the wires;
- and
- a plurality of stress relief pads formed on the major surface of at least one of the ceramic layers in the vicinity of selected ones of the functional vias, the stress relief pads reducing stress formed in the at least one of the ceramic layers during ceramic sintering manufacturing steps as a result of thermal coefficient of expansion differences between the selected ones of the functional vias and the ceramic substrate.
Dependencies are inferred from the claim text.