Semiconductor device and method for manufacturing semiconductor device

A semiconductor device comprising:

• a semiconductor layer having a first region to be formed of two first type MOS transistors and a second region to be formed of two second type MOS transistors;
• a field insulating layer surrounding said first region and said second region on a surface of said semiconductor;
• a first gate insulating layer formed on said surface of said semiconductor layer in said first region;
• a second gate insulating layer formed on said surface of said semiconductor layer in said second region;
• a first gate electrode formed on said first gate insulating layer and said second gate insulating layer over said field insulating layer;
• a first gate covering insulating film formed on top face and side faces of said first gate electrode;
• a first opening formed in a part of said first gate covering insulating film;
• a first silicide layer formed on a surface of said first gate electrode under said first opening;
• a second gate electrode formed on said first gate insulating layer and said second gate insulating layer over said field insulating layer, and second gate electrode is separated from said first gate electrode;
• a second gate covering insulating film formed on top face and side faces of said second gate electrode;
• a second opening formed in a part of said second gate covering insulating film;
• a second silicide layer formed on a surface of said second gate electrode under said second opening;
• first conductive type impurity diffusion layers as sources and drains of said first type MOS transistors formed in said semiconductor layer both sides of said first and second gate electrodes in said first region;
• a third silicide layer formed on surface of each said first conductive type impurity diffusion layer, said third silicide layers are made of the same material as that of said first silicide layer;
• second conductive type impurity diffusion layers as sources and drains of said second MOS transistors formed on said surface of said semiconductor layer both sides of said first and second gate electrodes in said second region;
• a fourth silicide layer formed on surface of each said second conductive type impurity diffusion layer, said fourth silicide layers are made of the same material as that of said first silicide layer;
• a first lower interconnection of a conductive material contacted on said first silicide layer through said first opening, said first lower interconnection is extended to one of said fourth silicide layers over said field insulating layer and second gate covering insulating film;
• a second lower interconnection made of the same material as that of said first lower interconnection and contacted on said second silicide layer through said second opening, said second lower interconnection is extended to one of said third silicide layers over said field insulating layer and first gate covering insulating film without crossing said first lower interconnection;
• a contact pad formed on one of said third silicide layers between said first and second gate covering insulating layers, said contact pad is made of the same material as that of said first lower interconnection;
• an interlevel insulator formed on said first and second gate covering insulating films, said third and fourth silicide layers, said first and second lower interconnection electrodes and field insulating layer;
• a contact hole formed in said interlevel insulator so as to expose said contact pad;
• and
• an upper interconnection formed on said interlevel insulator and contacted to said contact pad electrically through said contact hole.