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US 5,691,560 AGranted
Nonvolatile semiconductor memory device and method of manufacturing the same
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorKiyohiko Sakakibara
Life of this patent
Estimating the term…
Abstract
Under an N.sup.- -drain region covering an N.sup.+ -drain region, a P.sup.+ -impurity region is formed without covering an end of the N.sup.- -drain region near a channel region. Thereby, the P.sup.+ -impurity region suppresses a punch-through phenomenon, while the N.sup.- -drain region prevents a leak current due to interband tunneling.
Claims7
A nonvolatile semiconductor memory device which performs erasing by injecting electrons into a floating gate electrode, comprising:
- a semiconductor substrate of a first conductivity type having a main surface;
- a source region and a drain region of a second conductivity type formed on said main surface of said semiconductor substrate and spaced from each other by a predetermined distance to define a channel region therebetween;
- a first impurity region of the second conductivity type formed under and surrounding at least said drain region and extending to the main surface of the semiconductor substrate, said first impurity region having an impurity concentration lower than that of said drain region;
- and
- a second impurity region of the first conductivity type formed under at least said first impurity region without extending under a portion of said first impurity region near said channel region at the main surface of the semiconductor substrate, wherein only the second impurity region of the first conductivity type is formed in contact with the bottom surface of the first impurity region of the second conductivity type.
2 more elements
A nonvolatile semiconductor memory device which performs erasing by injecting electrons into a floating gate electrode, comprising:
- a semiconductor substrate of a first conductivity type having a main surface;
- a source region and a drain region of a second conductivity type formed on said main surface of said semiconductor substrate and spaced from each other by a predetermined distance to define a channel region therebetween;
- a first impurity region of the second conductivity type formed under and surrounding at least said drain region and extending to the main surface of the semiconductor substrate, said first impurity region having an impurity concentration lower than that of said drain region;
- and
- a second impurity region of the first conductivity type formed under at least said first impurity region without extending under a portion of said first impurity region near said channel region to the main surface of the semiconductor substrate, wherein
- the concentration of the impurity of the first conductivity type at said second impurity region is lower than that of the impurity of the second conductivity type at said first impurity region.
3 more elements
Dependencies are inferred from the claim text.