Method for forming blanket planarization of the multilevel interconnection

A method for forming blanket planarization of a multilevel interconnected device, comprising the steps of:

• forming a first dielectric layer on a MOS device in a semiconductor substrate;
• forming a first connect window by etching a portion of said first dielectric layer;
• forming a first metal nitride as an adhesion layer on said first dielectric layer and coating on the surface of said first connect window;
• forming a first tungsten layer on said first metal nitride;
• back-etching said first tungsten layer to form a first tungsten plug;
• forming a first interconnection layer on said first dielectric layer and said first tungsten plug;
• forming a first silicon nitride layer on said first interconnection layer;
• forming a metal pattern by etching said first silicon nitride layer and said first interconnection layer;
• forming a second silicon nitride layer on said metal pattern and said first dielectric layer;
• forming a spacer by anisotropically etching said second silicon nitride layer to enclose said metal pattern;
• forming a silicon dioxide layer on said first dielectric layer by LPD-SiO.sub.2 selective deposition technique, said LPD-SiO.sub.2 being not deposited on silicon nitride to achieve multilevel interconnection;
• forming a second dielectric layer on said silicon dioxide layer and said metal pattern;
• forming a second connect window by etching a portion of said second dielectric layer;
• forming a second metal nitride as an adhesion layer on said second dielectric layer, thereby coating on the surface of said second connect window;
• forming a second tungsten layer on said second metal nitride;
• back-etching said second tungsten layer to form a second tungsten plug;
• and
• forming a second interconnection layer on said second dielectric layer and said second tungsten plug.