Method of CVD TiN barrier layer integration

A method of metallization in the fabrication of an integrated circuit device comprising:

• providing semiconductor device structures in and on a semiconductor substrate;
• depositing an insulating layer overlying said semiconductor device structures;
• etching an opening through said insulating layer to contact one of said semiconductor device structures;
• depositing a titanium glue layer overlying said insulating layer and within said opening;
• depositing a titanium nitride barrier layer overlying said titanium glue layer by chemical vapor deposition;
• depositing a first metal layer overlying said barrier layer and filling said opening;
• etching back said first metal layer to leave said first metal layer only within said opening whereby a portion of said titanium glue layer is exposed;
• thereafter annealing said substrate to form a titanium nitride protection layer on said exposed portion of said titanium glue layer;
• thereafter cleaning said substrate wherein said protection layer prevents oxidation of said titanium glue layer;
• and
• depositing a second metal layer overlying said first metal layer and patterning said second metal layer to complete said metallization in the fabrication of said integrated circuit device.

A method of metallization in the fabrication of an integrated circuit device comprising:

• providing semiconductor device structures in and on a semiconductor substrate;
• depositing an insulating layer overlying said semiconductor device structures;
• etching an opening through said insulating layer to contact one of said semiconductor device structures;
• depositing a first titanium glue layer overlying said insulating layer and within said opening;
• depositing a titanium nitride barrier layer overlying said first titanium glue layer by chemical vapor deposition;
• depositing a first metal layer overlying said barrier layer and filling said opening;
• etching back said first metal layer to leave said first metal layer only within said opening whereby a portion of said first titanium glue layer is exposed;
• depositing a second titanium layer overlying said exposed first titanium glue layer;
• thereafter annealing said substrate to form a titanium nitride protection layer on said second titanium glue layer;
• thereafter cleaning said substrate wherein said protection layer prevents oxidation of said first and second titanium glue layers;
• and
• depositing a second metal layer overlying said first metal layer and patterning said second metal layer to complete said metallization in the fabrication of said integrated circuit device.