Field effect transistor with recessed gate
AssigneeNEC Corporation
InventorHikaru Hida
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AssigneeNEC Corporation
InventorHikaru Hida
Estimating the term…
In an FET structure, an n-type AlGaAs electron supplying layer is provided above a GaAs channel layer, and a low-resistivity n-type GaAs contact layer (the first semiconductor layer) is provided between the source/drain electrode and the electron supplying layer. A high-resistivity AlGaAs layer (the second semiconductor layer) is formed on the sidewalls of the contact layer and the immediately adjacent region between the gate electrode and the contact layer. According to the present invention, since a semiconductor film is used as the thin film formed on the sidewall and the adjacent electron supplying layer instead of a conventional insulating film, and moreover since AlGaAs is substantially lattice matched to GaAs and has a larger band width, parasitic resistance is reduced significantly, and the fluctuation of device performance properties is prevented while still maintaining high breakdown voltage. A semiconductor layer having a conduction type opposite that of the contact layer may also be used in place of the high resistivity AlGaAs layer.
A field effect transistor comprising:
A field effect transistor comprising:
A field effect transistor comprising:
Dependencies are inferred from the claim text.