Controlled taper etching

A method of manufacturing a semiconductor device comprising the steps of:

• (a) providing a semiconductor substrate having a horizontal plane;
• (b) providing a wiring layer comprising polycrystalline silicon on the horizontal plane and an etchant mask over a portion of the wiring layer;
• and
• (c) taper etching the wiring layer in Cl or Br containing plasma of an ambient atmosphere including an aluminum halide species to form a wiring to serve as an electrical connection on the semiconductor device, the wiring having side walls, and simultaneously depositing solid aluminum halide film formed from the aluminum halide species in the plasma on the side walls to protect the side walls from side-etching, wherein taper etching means that the profile of the resulting etched wiring layer is such that no peripheral location under the mask has encroachment from a mask edge at the interface between the mask and the wiring layer.

A method of manufacturing a semiconductor device comprising the steps of:

• (a) providing a vacuum apparatus;
• (b) providing a specific metal element in the vacuum apparatus;
• (c) providing a semiconductor substrate having a wiring layer thereon in the vacuum apparatus;
• (d) forming a plasma including halogen species in the vacuum apparatus;
• (e) subjecting the specific metal element to the plasma to generate specific metal halide in the plasma, the specific metal halide keeping solid phase at a room temperature;
• (f) simultaneously subjecting the wiring layer to the plasma to form wiring to serve as an electrical connection on the semiconductor device, the wiring having side walls with a solid phase specific metal halide thereon to protect the wiring from side-etching.