US 5,686,330 A · Method of making a self-aligned static induction transistor

Abstract

A method of fabricating self-aligned static induction transistors is disclosed. The method comprises fabricating a silicon substrate having an active area. A guard ring is formed around the active area. Source and gate regions are formed, and a self-aligned relatively deep trench in accordance with the present invention is formed over the gate regions. This is achieved by forming an oxide layer, and forming a polysilicon layer on the oxide layer. A second oxide layer is formed on the polysilicon layer which is then masked by a self-aligning mask. Trenches are etched into the source and gate regions using the self-aligning mask and gate regions are formed at the bottom of the trenches. The transistors are then processed to completion by forming gate, source and drain regions. This portion of the method comprises the steps of forming maskless self-aligned gate metallization, forming maskless self-aligned contacts to the gate metallization and filling the trench, forming source metallization, and forming a drain contact on the substrate. The method employs a single minimum geometry trench mask. The key features of the transistors are defined by the trench mask and related processing parameters. Because of the self-alignment achieved by the present invention, the number of channels per unit area is higher, which results in higher transconductance. In addition, some parasitic capacitance is eliminated by the present invention, resulting in faster operational speed. The variable sidewall trench oxide thickness allows fabrication of static induction transistors with higher or lower breakdown voltages according to the thickness that is chosen, and for a more graded gate junction.

Claims17

Dependent claims

A method of making a self-aligned static induction transistor comprising the steps of:

fabricating a silicon substrate having a top surface and a bottom surface;
forming an active area on the top surface of the substrate;
forming a guard ring surrounding the active area;
forming source and gate regions on the substrate;
forming self-aligned deep trenches in the source and gate regions
wherein each trench has a top surface and a bottom surface and wherein said trenches in said source regions are relatively narrow and said trenches in said gate regions are relatively wide;
forming maskless self-aligned gate metallization in the bottom of said trenches;
depositing a layer of plasma nitride on the surface of the transistor to completely fill the relatively narrow trenches in the source regions and partially fill the relatively wide trenches in the gate regions;
planarizing the plasma nitride layer whereby contacts are opened to the gate metallization in the gate region;
forming source metallization on the source region;
and
forming a drain contact on the bottom surface of the substrate to complete the self-aligned static induction transistor.

9 more elements

A method of making a self-aligned static induction transistor, said method comprising the steps of:

fabricating an N.sup.- silicon layer on an N.sup.+ silicon substrate;
forming an active area on the substrate;
forming a guard ring surrounding the active area;
forming an N.sup.+ layer in the substrate that comprises source and gate regions of the transistor;
forming an oxide layer on the N.sup.+ layer;
forming a polysilicon layer on the oxide layer;
forming a second oxide layer on the polysilicon layer;
forming a self-aligning mask on the second oxide layer;
etching trenches into the source and gate regions using the self-aligning mask wherein said trenches in said source regions are relatively narrow and said trenches in said gate regions are relatively wide;
forming gate regions at the bottom of the trenches in said gate regions;
depositing a first layer of metal on top of the transistor to make contact with the gate regions;
depositing and planarizing a layer of photoresist on the surface of the transistor;
etching the first layer of metal to a predetermined depth below the top surface of the trenches;
depositing a layer of plasma nitride on the surface of the first layer of metal to completely fill the trenches in the source regions and partially fill the trenches in the gate regions;
planarizing the plasma nitride layer whereby contacts are opened to the first layer of metal in the gate regions;
depositing a second layer of metal on the transistor to make contact with the source and gate regions;
depositing a passivation layer on the second layer of metal;
and
forming interconnection pads that connect the first and second layers of metal.

16 more elements

Dependencies are inferred from the claim text.

Method of making a self-aligned static induction transistor

Life of this patent

Method of making a self-aligned static induction transistor

Life of this patent

Abstract

Claims17