Sensitive protection component for a subscriber line interface circuit
AssigneeSGS-Thomson Microelectronics S.A.
InventorEric Bernier
Life of this patent
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Abstract
A high-speed monolithic protection semiconductor component implements two NPN transistors and two diodes. The cathodes of the diodes and the collectors of the transistors are connected to a common terminal. The anode of a diode is connected to the emitter of a transistor. The component includes a low-doped N-type semiconductor substrate whose bottom surface has a highly doped layer coated with a first metallization, first and second highly doped P-type regions, a low-doped P-type well in which are formed N-type third and fourth regions and a P-type fifth region. A second metallization connects the first and third regions. A third metallization connects the second and fourth regions. A fourth metallization is integral with the fifth region.
Claims24
A high speed monolithic protection semiconductor component having formed thereon first and second NPN transistors each having a base, an emitter and a collector, first and second diodes each having a cathode and an anode, first, second, and common terminals, and wherein the cathodes of the first and second diodes and the collectors of the first and second transistors are adapted to be connected to the common terminal, the anode of the first diode and the emitter of the first transistor are adapted to be connected to the first terminal, the anode of the second diode and the emitter of the second transistor are adapted to be connected to the second terminal, and the bases of the first and second transistors are adapted to be connected to a reference voltage, the component comprising:
- a low doped N-type semiconductor substrate having a first surface;
- a highly-doped layer, bordering the first surface, coated with a first metallization;
- first and second highly-doped P-type regions formed in the substrate;
- a low doped P-type well formed in the substrate;
- N-type third and fourth regions, and a P-type fifth region, the third, fourth and fifth regions formed in the low-doped P-type well;
- a second metallization connecting the first and third regions;
- a third metallization connecting the second and fourth regions, and
- a fourth metallization coupled to the fifth region.
A monolithic semiconductor protection component comprising:
- a first diode having a cathode and an anode;
- a second diode having a cathode and an anode;
- a first transistor having a base, an emitter and a collector;
- a second transistor having a base, an emitter and a collector;
- a common terminal, wherein the cathodes of the first and second diodes and the collectors of the first and second transistors are coupled to the common terminal;
- a first terminal, wherein the emitter of the first transistor and the anode of the first diode are coupled to the first terminal;
- and
- a second terminal, wherein the emitter of the second transistor and the anode of the second diode are coupled to the second terminal.
A monolithic semiconductor protection component comprising:
- a first diode having a cathode and an anode;
- a second diode having a cathode and an anode;
- a common terminal, wherein the cathodes of the first and second diodes are coupled to the common terminal;
- a first terminal, wherein the anode of the first diode is coupled to the first terminal;
- a second terminal, wherein the anode of the second diode is coupled to the second terminal;
- and
- means for providing a low resistive connection between ground and the common terminal when the voltage at one of the first and second terminals is a voltage less than a reference voltage.
A method of protecting a circuit, having at least one input, from over and undervoltages occurring at the at least one input, the method comprising the steps of:
- (A) receiving a reference voltage from the circuit;
- (B) receiving an input signal at the at least one input;
- (C) providing a first low resistive connection between the at least one input and ground when an overvoltage occurs at the input signal at the at least one input;
- and
- (D) providing a second low resistive connection between the at least one input and ground when an undervoltage below the reference voltage occurs at the at least one input.
Dependencies are inferred from the claim text.