Semiconductor memory device capable of electrically erasing and writing information and a manufacturing method of the same

A manufacturing method of a semiconductor memory device, comprising the steps of:

• forming a first impurity region by introducing an impurity of a second conductivity type onto a main surface of a semiconductor substrate of a first conductivity type;
• forming a second impurity region under said first impurity region by introducing impurity of the first conductivity type into a region under said first impurity region;
• forming a charge storage electrode on a region of said main surface of said semiconductor substrate with a first dielectric film therebetween;
• forming a control electrode on said charge storage electrode with a second dielectric film therebetween;
• and
• forming third and fourth impurity regions serving as source/drain regions with a channel region therebetween by introducing an impurity of the second conductivity type into said semiconductor substrate, using said control electrode as a mask, wherein
• said step of forming said second impurity region includes the step of controlling the introduction of said second impurity so that a junction surface between said second impurity region and said semiconductor substrate is located at a depth shallower than that of a junction surface between said semiconductor substrate and said third and fourth impurity regions, and said first impurity region is formed in and completely across the channel region.

A manufacturing method of a semiconductor memory device capable of electrically writing and erasing information, comprising the steps of:

• forming a source region of a second conductivity type and a drain region of a second conductivity type on a main surface of a semiconductor substrate of a first conductivity type, said source and drain regions being located at opposite sides of a channel region with a space between each other;
• forming a source conductive layer on and in contact with a region in which said source region is formed;
• roughening a surface of said channel region to form convex portions;
• forming a charge storage electrode at least on said channel region with a first dielectric film therebetween;
• and
• forming a control electrode on said charge storage electrode with a second dielectric film therebetween.