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US 5,683,922 AGranted
Method of fabricating a self-aligned contact
AssigneeUnited Microelectronics Corp.
InventorsJason Jeng, Chia-Wen Liang
Life of this patent
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Abstract
A method of forming a self-aligned contact for a transistor formed on a substrate. A self-aligned silicide layer is formed on the surface of a source/drain region of the transistor. A silicon oxide/silicon nitride layer is formed over the transistor. Then, a planarization process is performed to fill a trench between gates with, for example, borophosphosilicate glass. In particular, wet etching using a 20:1 buffered oxide etchant is performed to increase the selectivity of the silicon oxide/silicon nitride layer.
Claims11
A method of fabricating a self-aligned contact, comprising the steps of:
- forming a field oxide layer on a semiconductor substrate to define an active region in the semiconductor substrate;
- forming a transistor in the active region, the transistor including a gate oxide film, a gate, and a source/drain region;
- forming a film of self-aligned silicide on the source/drain region;
- forming a first dielectric film over the silicide film;
- planarizing the surface by forming, over the first dielectric film, a second dielectric layer which is much thicker than the first dielectric film;
- forming a first polysilicon layer over the second dielectric layer;
- patterning the first polysilicon layer in order to define a self-aligned contact area;
- removing the second dielectric layer by wet etching using a buffered oxide etchant;
- and
- removing the first dielectric film to expose the silicide film.
7 more elements
Dependencies are inferred from the claim text.