Programming flash memory using strict ordering of states

A nonvolatile memory system comprising:

• an array of memory cells wherein each memory cell is capable of achieving more than two states, each state being associated with one of a corresponding plurality of threshold levels;
• and
• a control engine coupled to the array of memory cells, the control engine initially erasing the array of memory cells then programming the array of memory cells by applying a plurality of programming pulses to the array of memory cells, wherein each of the plurality of programming pulses has one of a plurality of programming voltage levels selected to program affected memory cells directly to a state that corresponds to the programming voltage level without performing a verify operation, wherein programming of the memory cells occurs in a saturated region.

A nonvolatile memory system comprising:

• means for selecting a plurality of different programming voltage levels, each programming voltage level being associated with a corresponding one of a plurality of states;
• and
• means for applying a plurality of programming pulses to selected subsets of the array of memory cells, each programming pulse having one of the programming voltage levels and one of a corresponding plurality of pulse widths such that each of the memory cells of a corresponding one of the selected subsets are programmed directly to a corresponding one of the plurality of states by a corresponding programming pulse without performing a verify operation, wherein programming occurs in a saturation region.