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US 5,675,170 AGranted
Data output buffer
AssigneeHyndai Electronics Industries, Co., Ltd.
InventorPil Jong Kim
Life of this patent
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Abstract
A data output buffer is disclosed. Generation of a latch-up is prevented by forming a N-well guard ring to interrupt the movement of minority carriers injected from the drain of NMOS transistor to the N.sup.+ pickup region of PMOS transistor. Accordingly, reliability of the device is improved.
Claims1
A data output buffer comprising:
- a P-type substrate having a P-well and a N-well formed relative to each other on said substrate;
- a NMOS transistor formed in said P-well of said P-type substrate, said NMOS transistor having first and second N.sup.+ regions connected to a first source electrode and a first drain electrode, respectively, and a first gate electrode;
- a PMOS transistor formed in said N-well of said P-type substrate, said PMOS transistor having first and second P.sup.+ regions connected to a second source electrode and a second drain electrode, respectively, and a second gate electrode;
- a data input and output pad connected to said second N.sup.+ region of said NMOS transistor and to said first P.sup.+ region of said PMOS transistor;
- and
- a N-well guard ring continuously formed in said P-type substrate at locations Under said data input and output pad and surrounding said P-well and N-well.
3 more elements
Dependencies are inferred from the claim text.