Semiconductor memory apparatus for a dynamic RAM and method for manufacturing the same

A semiconductor memory device comprising:

• a semiconductor substrate having a memory cell area;
• a plurality of trenches selectively formed in the memory cell area aligning in certain intervals;
• and
• a plurality of memory cells provided in the memory cell area, each of the memory cells comprising:
• a plurality of MOS transistors, each of the transistors having a gate electrode above the substrate with a gate insulating film formed therebetween and source and drain regions formed in the substrate on both sides of the gate electrode and
• a plurality of capacitors each formed in a corresponding one of the trenches, each of the capacitors including,
• a charge storage layer formed on an inner wall of each of the trenches and connected to one of the source and drain regions of each of the transistors,
• a capacitor insulating film formed on the charge storage layer, and
• a capacitor electrode formed on the capacitor insulating film so as to bury each of the trenches and extending to the surface of the substrate to make a protruded portion having a top surface and a side surface, the capacitor electrode being formed on the surface of the substrate except for at least formation areas of the transistors;
• wherein the gate electrode of each of the MOS transistors is elongated and terminated above the capacitor electrode except for an edge portion of the gate electrode which is arranged along an outer area of the memory cell area and is elongated in a transverse direction to the gate electrode on the semiconductor substrate, and contact to the gate electrode is formed on the gate electrode above the capacitor electrode arranged along the outer area of the memory cell area.